13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)最新文献

{"title":"Testing Model-Processing Tools for Embedded Systems","authors":"P. Sampath, A. Rajeev, S. Ramesh, K. Shashidhar","doi":"10.1109/RTAS.2007.39","DOIUrl":"https://doi.org/10.1109/RTAS.2007.39","url":null,"abstract":"Model-based development is increasingly becoming the method of choice for developing embedded systems for applications in automotive and aerospace industries. It relies on tool-suites consisting of a variety of model-processing tools like simulators, model-translators and code-generators. The correctness of these tools used in the development process is a key requirement for safety critical applications. This paper proposes a novel testing methodology for the rigorous verification of model processing tools. The proposed methodology takes as input the syntactic and semantic meta-model of a modeling language, expressed in the form of inference rules. Using a coverage criteria over this meta-model, it generates test-models, and test-inputs for these test-models. Apart from testing the syntactic aspects of the translation, our method aims at testing subtle semantic interactions of the modeling language that are potentially mistranslated by the model-processing tools. We illustrate the methodology with a simple prototypical process calculus. We also report on the experiments carried out with Stateflow, a variant of hierarchical state-machines implemented in the Matlab/Simulink tool-suite","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131753975","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Modeling Device Driver Effects in Real-Time Schedulability Analysis: Study of a Network Driver","authors":"Mark Lewandowski, M. Stanovich, T. Baker, Kartik Gopalan, An-I Wang","doi":"10.1109/RTAS.2007.18","DOIUrl":"https://doi.org/10.1109/RTAS.2007.18","url":null,"abstract":"Device drivers are integral components of operating systems. The computational workloads imposed by device drivers tend to be aperiodic and unpredictable because they are triggered in response to events that occur in the device, and may arbitrarily block or preempt other time-critical tasks. This characteristic poses significant challenges in real-time systems, where schedulability analysis is essential to guarantee system-wide timing constraints. At the same time, device driver workloads cannot be ignored. Demand-based schedulability analysis is a technique that has been successful in validating the timing constraints in both single and multiprocessor systems. In this paper we present two approaches to demand-based schedulability analysis of systems that include device drivers. First, we derive load-bound functions using empirical measurement techniques. Second, we modify the scheduling of network device driver tasks in Linux to implement an algorithm for which a load-bound function can be derived analytically. We demonstrate the practicality of our approach through detailed experiments with a network device under Linux. Our results show that, even though the network device driver does not conform to conventional periodic or sporadic task models, it can be successfully modeled using hyperbolic load-bound functions that are fitted to empirical performance measurements","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130660946","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Take Intelligent Risk and Optimize Decision Based on Time, Available Resources and Risk Tolerance Limits","authors":"Yue Yu, Shangping Ren, K. Kwiat","doi":"10.1109/RTAS.2007.37","DOIUrl":"https://doi.org/10.1109/RTAS.2007.37","url":null,"abstract":"In real-time environment, data usually has a lifespan associated with it. The semantics and the importance of the data depend on the time when data is utilized. Hence, the process of getting a consensus data from a group of replicated units must not take longer time than the lifespan of the data. However, in real environment, every unit, faulty or non-faulty, may encounter delays when processing and sending their data which inevitably increases the time of acquiring a consensus. The latency for obtaining a valid data hence depends not only on the time when individual replicas make their votes, but also on the accuracy and credibility of the votes. Thus, a new metric, i.e. a credibility function, needs to be taken into account when evaluating expected time and deciding upon data replications. This paper presents analytical solutions for the expected time when dependable data can be obtained under different voting schemes. We show that if not all replicas are truthful, increasing replication does not reduce the time for obtaining valid results. When different types of resources are used to ensure the quality of the data, we show that the allocation of the resource plays an important role in satisfying both data availability and consistency constraints. We further demonstrate that when point-based constraints may be intrinsically impossible to satisfy, a more general interval-based constraint can be used to obtain statistical solutions","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129721319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Stochastic Metrics for Debugging the Timing Behaviour of Real-Time Systems","authors":"J. Entrialgo, Javier García, J. L. Díaz, D. García","doi":"10.1109/RTAS.2007.36","DOIUrl":"https://doi.org/10.1109/RTAS.2007.36","url":null,"abstract":"Stochastic analysis techniques for real-time systems model the execution time of tasks as random variables. These techniques constitute a very powerful tool to study the behaviour of real-time systems. However, as they can not avoid all the timing bugs in the implementation, they must be combined with measurement techniques in order to gain more confidence in the implemented system. In this paper, a set of tools to measure, analyze and visualize traces of real-time systems is presented. These tools are driven by stochastic models. In order to find bugs in the timing behaviour of the system, two metrics, called \"pessimism\" and \"optimism\", are proposed. They are based on two random variables, the optimistic and the pessimistic execution time, which are also introduced in this paper. These metrics are used in the debugging tools to compare the model and the measured system in order to find errors. The metrics are examined in three case studies","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116113318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"CPU Model-Based Hardware/Software Co-design, Co-simulation and Analysis Technology for Real-Time Embedded Control Systems","authors":"M. Ishikawa, D. J. McCune, G. Saikalis, S. Oho","doi":"10.1109/RTAS.2007.9","DOIUrl":"https://doi.org/10.1109/RTAS.2007.9","url":null,"abstract":"This paper proposes a new development method for highly reliable real-time embedded control systems using a CPU model-based hardware/software co-simulation. We take an approach that allows the full simulation of the virtual mechanical control system including the mechatronics plant, microcontroller hardware and object code level software. This full virtual system simulation reveals the control system behavior, especially in microcontroller hardware and software. It enables microarchitecture design space exploration, control design validation, robustness evaluation of the system, software optimization before components design, and prevents potential problems. A novel aspect of this work is that the proposed virtual control system comprises all the components in a typical control system, therefore it enables the analysis of the effects from the different domains, for example the mechanical analysis of behavior due to a control software bug. To help the design, evaluation and analysis, we developed an integrated behavior analyzer into the development environment. This can display the processor behavior graphically during the simulation without affecting the simulation results, such as task level CPU load, interrupt statistics and software variable transition chart. This analyzer provides useful information on the behavior. No software modification is necessary for this virtual system analysis, and this analysis does not change the control timing and does not require any processing power on the target microcontroller. Therefore this method is suitable for real-time embedded control system design, in particular automotive control system design which requires high level reliability, robustness, quality and safety. In this paper, a Renesas SH-2A microcontroller model was developed on a CoMETtrade platform from VaST Systems Technology. An ETC (electronic throttle control) system is chosen as the plant to prove this concept. The ETB (electronic throttle body) model on Saberreg simulator from Synopsysreg was co-simulated with the SH-2A model. The SH-2A chip was under development during this project, nevertheless we could complete the OSEK OS development, control software design and verification using the virtual system. We confirmed that such software could run on an actual ETC hardware system without modification after a working sample chip was released at a later stage in the course of this work. This demonstrates that our models and simulation environment are sufficiently credible and trustful","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131618661","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An Approach for Real-Time Database Modeling and Performance Management","authors":"Jisu Oh, K. Kang","doi":"10.1109/RTAS.2007.6","DOIUrl":"https://doi.org/10.1109/RTAS.2007.6","url":null,"abstract":"It is challenging to manage the performance of real-time databases (RTDBs) that are often used in data-intensive real-time applications such as agile manufacturing and target tracking. Feedback control has recently been considered a promising approach to enabling reliable real-time data service. However, most existing work on feedback control of RTDB performance is not based on a RTDB-specific control model, which is critical for closed-loop system design. To address this problem, we design a novel RTDB model that can capture RTDB dynamics by modeling the relation between the total arrival rate (sum of the transaction arrival rate and restart rate) and utilization via a difference equation. Based on the model, we design and tune a utilization controller to compute the total arrival rate adjustment needed to support the desired average/transient utilization. We also design a QoS management scheme and admission control technique that can judiciously adapt the transaction QoS and arrival rate in a RTDB, if necessary, to support the desired utilization, while enhancing the success ratio. In a simulation study, we show that our approach can support the desired average/transient utilization for a range of transaction arrival rates under severe data contention, while considerably improving the success ratio compared to the tested baselines","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115122400","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Performance Debugging of Real-Time Systems Using Multicriteria Schedulability Analysis","authors":"Unmesh D. Bordoloi, S. Chakraborty","doi":"10.1109/RTAS.2007.26","DOIUrl":"https://doi.org/10.1109/RTAS.2007.26","url":null,"abstract":"Most of today's real-time embedded systems consist of a heterogeneous mix of fully-programmable processors, fixed-function components or hardware accelerators, and partially-programmable engines. Hence, system designers are faced with an array of implementation possibilities for an application at hand. Such possibilities typically come with different tradeoffs involving cost, power consumption and packaging constraints. As a result, a designer is no longer interested in one implementation that meets the specified real-time constraints (i.e. is schedulable), but would rather like to identify all schedulable implementations that expose the different possible performance tradeoffs. In this paper we formally define this multicriteria schedulability analysis problem and derive a polynomial-time approximation algorithm for solving it. This result is interesting because the problem of optimally computing even one schedulable solution in our setup (and in most common setups) is computationally intractable (NP-hard). Further, our algorithm is reasonably easy to implement, returns good quality (approximate) solutions, and offers significant speedups over optimally computing all schedulable tradeoffs","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133463443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Preemption Threshold Scheduling: Stack Optimality, Enhancements and Analysis","authors":"R. Ghattas, A. Dean","doi":"10.1109/RTAS.2007.27","DOIUrl":"https://doi.org/10.1109/RTAS.2007.27","url":null,"abstract":"Using preemption threshold scheduling (PTS) in a multi-threaded real-time embedded system reduces system preemptions and hence reduces run-time overhead while still ensuring real-time constraints are met. However, PTS offers other valuable benefits. In this paper we investigate the use of PTS for hard real-lime system with limited RAM. Our primary contribution is to prove the optimality of PTS among all preemption-limiting methods for minimizing a system's total stack memory requirements. We then discuss characteristics of PTS and show how to reduce average worst-case response times. We also introduce a unified framework for using PTS with existing fixed-priority (e.g. rate-or deadline-monotonic), or dynamic-priority scheduling algorithms ( e.g. earliest-deadline first). We evaluate the performance of PTS and our improvements using synthetic workloads and a real-time workload. We show PTS is extremely effective at reducing slack memory requirements. Our enhancements to PTS Improve worst-case, response-times as well","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133101410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"On the Minimization fo the Instantaneous Temperature for Periodic Real-Time Tasks","authors":"Jian-Jia Chen, Chia-Mei Hung, Tei-Wei Kuo","doi":"10.1109/RTAS.2007.21","DOIUrl":"https://doi.org/10.1109/RTAS.2007.21","url":null,"abstract":"While there is a tradeoff between the energy consumption and the satisfaction of task deadlines, the management of the processor temperature is of paramount important to the survival of the processor and the reduction of packing cost. This paper explores the scheduling of periodic real-time tasks with temperature-aware considerations in a uniprocessor or homogeneous multiprocessor environment. By modeling the cooling process approximately according to Fourier's law, a 2.719-approximation algorithm is shown for the minimization of the maximum temperature for processors with continuous processor speeds. When the processor is with discrete speeds only, we extend the 2.719 approximation algorithm to manage the voltage/speed transition so that the maximum temperature can be minimized. For homogeneous multiprocessor systems, we show that the largest-task first strategy has a 3.072-approximation bound in the minimization of the maximum temperature when all of the processors are on a chip. When each processor is on a chip, the approximation bound in the minimization of the maximum temperature is 6.444. When jobs might complete earlier than their worst-case estimation, dynamic scheduling is further explored to reduce the maximum temperature","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122145685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Real-Time Task Replication for Fault Tolerance in Identical Multiprocessor Systems","authors":"Jian-Jia Chen, Chuan-Yue Yang, Tei-Wei Kuo, S. Tseng","doi":"10.1109/RTAS.2007.30","DOIUrl":"https://doi.org/10.1109/RTAS.2007.30","url":null,"abstract":"Multiprocessor platforms have been widely adopted in both embedded and server systems. In addition to the performance improvement, multiprocessor systems could have the flexibility in tolerating processor failures via task replication. This paper considers the replication of periodic hard real-time tasks in identical multiprocessor environments. Each task is replicated on K distinct processors, where K is a user-determined integer for fault tolerance to improve system reliability. When the objective is to minimize the maximum utilization in a system with a specified number of processors, we present a greedy algorithm with a 2-approximation ratio, and a polynomial-time approximation scheme is developed. For the minimization of the number of processors required to derive feasible schedules with task replication, we develop greedy algorithms with a 2-approximation ratio and an asymptotic polynomial-time approximation scheme","PeriodicalId":222543,"journal":{"name":"13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124930033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}