2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)最新文献

EnclaveSim:A Micro-architectural Simulator with Enclave Support EnclaveSim:一个支持Enclave的微架构模拟器

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/HOST54066.2022.9839725

Yashika Verma, Dixit Kumar, Biswabandan Panda

{"title":"EnclaveSim:A Micro-architectural Simulator with Enclave Support","authors":"Yashika Verma, Dixit Kumar, Biswabandan Panda","doi":"10.1109/HOST54066.2022.9839725","DOIUrl":"https://doi.org/10.1109/HOST54066.2022.9839725","url":null,"abstract":"Intel SGX preserves the confidentiality and integrity aspects of data and code through enclaves (that reside in the trusted part of the memory) and protects it from different layers of the malicious system software, including the OS. Micro-architecture research in the presence of SGX is an interesting theme to explore as SGX does not mitigate timing side-channel attacks at various levels of a memory hierarchy and causes significant performance slowdown. The research community extensively uses existing benchmark suites like SPEC CPU 2017 for evaluating new proposals on the various aspects of micro-architecture research. As there is no benchmark suite available for micro-architecture research with SGX, state-of-the-art micro-architecture research in the presence of SGX assumes an entire SPEC benchmark is running inside an enclave. In reality, Intel SGX assumes that a major portion of the application's code and data do not require security, and only a tiny fraction of it needs security via an enclave. To the best of our knowledge, there are no open-source micro-architectural simulators that can simulate Intel SGX fairly, for micro-architecture research. In this regard, we propose EnclaveSim, a detailed yet flexible, trace-based micro-architectural simulator that simulates trusted code execution through enclaves.","PeriodicalId":222250,"journal":{"name":"2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","volume":"395 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116651385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Metrics for Assessing Security of System-on-Chip 评估片上系统安全性的指标

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/HOST54066.2022.9839854

S. Saha, Joel Mandebi Mbongue, C. Bobda

引用次数: 1

Layout-level Vulnerability Ranking from Electromagnetic Fault Injection 电磁故障注入的布图级漏洞排序

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/HOST54066.2022.9840146

Lang Lin, Jimin Wen, Harsh Shrivastav, Weike Li, Hua Chen, Gang Ni, Sreeja Chowdhury, C. Chow, N. Chang

引用次数: 0

Proceedings of the 2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2022 IEEE面向硬件的安全与信任(HOST)国际研讨会论文集

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/host54066.2022.9839913

引用次数: 0

Characterizing Side-Channel Leakage of DNN Classifiers though Performance Counters 利用性能计数器表征DNN分类器的侧信道泄漏

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/HOST54066.2022.9839882

Saikat Majumdar, Mohammad Hossein Samavatian, R. Teodorescu

引用次数: 0

Hardware Trojan Detection at LUT: Where Structural Features Meet Behavioral Characteristics LUT硬件木马检测:结构特征满足行为特征

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/HOST54066.2022.9840276

Lingjuan Wu, Xuelin Zhang, Siyi Wang, Wei Hu

引用次数: 3

System on Chip (SoC) Security Architecture Framework for Isolated Domains Against Threats 针对威胁的隔离域SoC安全架构框架

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/HOST54066.2022.9840295

Siam Haque, Shahnam Mirzaei

{"title":"System on Chip (SoC) Security Architecture Framework for Isolated Domains Against Threats","authors":"Siam Haque, Shahnam Mirzaei","doi":"10.1109/HOST54066.2022.9840295","DOIUrl":"https://doi.org/10.1109/HOST54066.2022.9840295","url":null,"abstract":"This paper presents a definition of a secure system and design principles, which help govern security policies within an embedded system. By understanding a secure system, a common system on chip (SoC) architecture is evaluated and their vulnerabilities explored. This effort helped define requirements for a framework for a secure and isolated SoC architecture for users to develop in. Throughout this paper, a SoC architecture framework for isolated domains has been proposed and its robustness verified against different attack scenarios. To support different levels of criticality and complexity in developing user applications, three computing domains were proposed: security and safety critical (SSC) domain, high performance (HP) domain, and sandbox domain. These domains allow for complex applications to be realized with varying levels of security. Isolation between different computing domains is established using consumer off the shelf (COTS) techniques and architectural components provided by the Zynq Ultrascale+ (ZU+) multiprocessor SoC (MPSoC). To the best of our knowledge, this is the first work that implements a secure system design on the ZU+ platform. There have been many other implementations in hardware security to mitigate certain attack scenarios such as side channel attacks, temporal attacks, hardware trojans, etc. However, our work is different than others, as it establishes the framework for isolated computing domains for secure applications and also verifies system security by attacking one domain from the others.","PeriodicalId":222250,"journal":{"name":"2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128182450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Security Properties Driven Pre-Silicon Laser Fault Injection Assessment 安全特性驱动的预硅激光故障注入评估

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/HOST54066.2022.9840109

Nitin Pundir, Henian Li, Lang Lin, N. Chang, Farimah Farahmandi, M. Tehranipoor

{"title":"Security Properties Driven Pre-Silicon Laser Fault Injection Assessment","authors":"Nitin Pundir, Henian Li, Lang Lin, N. Chang, Farimah Farahmandi, M. Tehranipoor","doi":"10.1109/HOST54066.2022.9840109","DOIUrl":"https://doi.org/10.1109/HOST54066.2022.9840109","url":null,"abstract":"Laser fault injection (LFI) is a formidable physical attack due to its tremendous efficacy, high controllability, and precision. As a result, efforts to simulate laser effects have been undertaken in the literature to study its impact on digital designs. However, most of these efforts either model laser effects on standalone standard cells without considering the impact of layout parameters or propose scanning the entire chip grid-by -grid, which is extremely time-consuming to simulate at the layout level. In this paper, we propose LFI-aware sign-off solution for layouts to analyze the designs for LFI susceptibility and apply countermeasures. We employ security properties driven evaluation to identify critical LFI areas on the layout to reduce scanning time. And then perform dynamic power and rail analysis while replacing the cells under laser illumination with the generated cell-level power library, capturing the impact of laser-induced transient currents on the entire layout. Because the assessment is done at the layout level, the framework can capture the impact of different layout parameters (location of power pads, metal widths, power distribution network, DECAPs, etc.) while analyzing the design's susceptibility against LFI attacks to see which security properties of the design will be violated if laser faults are injected at the identified critical locations. We show the effectiveness of our approach on a fully implemented AES design layout for the proof-of-concent.","PeriodicalId":222250,"journal":{"name":"2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129519261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Structural Analysis Attack on Sequential Circuit Logic Locking 顺序电路逻辑锁的结构分析与攻击

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/HOST54066.2022.9840185

Gourav Takhar, Subhajit Roy

引用次数: 0

Oblivious Intrusion Detection System 遗忘入侵检测系统

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) Pub Date : 2022-06-27 DOI: 10.1109/HOST54066.2022.9840140

Mahmoud Abdelhafeez, Mostafa M. I. Taha

引用次数: 1