2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming最新文献

Run-Time Computation and Communication Aware Mapping Heuristic for NoC-Based Heterogeneous MPSoC Platforms 基于noc的异构MPSoC平台运行时计算和通信感知映射启发式算法

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.32

S. Kaushik, Ashutosh Kumar Singh, W. Jigang, T. Srikanthan

{"title":"Run-Time Computation and Communication Aware Mapping Heuristic for NoC-Based Heterogeneous MPSoC Platforms","authors":"S. Kaushik, Ashutosh Kumar Singh, W. Jigang, T. Srikanthan","doi":"10.1109/PAAP.2011.32","DOIUrl":"https://doi.org/10.1109/PAAP.2011.32","url":null,"abstract":"The rapid increase in the complexity of real-life applications has led to the perpetual demand of refined architectural designs. Multiprocessor systems-on-chip (MPSoC) emerges as one of the possible solution for satiating such enormous computational needs. These MPSoCs are employed with Network-On-Chip (NoC) interconnect for power efficient and scalable inter-communication required between processors. Mapping parallelized tasks of applications onto these MPSoCs is the next gigantic problem, which can be done either at design-time or at run-time. However, design-time strategies may sometimes provide a more optimal mapping but they are restricted to predefined set of applications and seem incapable of run-time resource management. On the contrary, run-time mapping techniques overcome this limitation by determining the state of the platform and incorporating resource management before mapping. This paper describes a heuristic for run-time mapping of parallelized tasks of an application considering efficient computation, communication and resource utilization as the main parameters for optimization.","PeriodicalId":213010,"journal":{"name":"2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116943601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 19

PCAR: Parallelism Based Cache Replacement Scheme to Exploit Inter-disks Parallelism and Intra-disk Spatial Locality in Parallel Disk Array PCAR:利用并行磁盘阵列磁盘间并行性和磁盘内空间局部性的并行缓存替换方案

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.69

Xiaodong Shi, D. Feng

引用次数: 1

Parallel Algorithm of Visualization of Reservoir Numerical Simulation Based on PEBI Grids 基于PEBI网格的油藏数值模拟可视化并行算法

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.73

Lanfang Dong, D. Lu, Meng Li

引用次数: 3

Performance Optimization of Top-k Queries on GPU GPU上Top-k查询的性能优化

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.11

Tao Luo, Guangzhong Sun, Guoliang Chen

引用次数: 0

GSM: An Efficient Code Generation Algorithm for Dynamic Binary Translator GSM:一种高效的动态二进制转换器代码生成算法

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.34

Xuhao Chen, Zhong Zheng, Li Shen, Wei Chen, Zhiying Wang

{"title":"GSM: An Efficient Code Generation Algorithm for Dynamic Binary Translator","authors":"Xuhao Chen, Zhong Zheng, Li Shen, Wei Chen, Zhiying Wang","doi":"10.1109/PAAP.2011.34","DOIUrl":"https://doi.org/10.1109/PAAP.2011.34","url":null,"abstract":"Dynamic binary translation is an effective way to address binary compatibility problem. Embedded systems and other novel RISC ISAs are developing fast without consideration of the binary compatibility with off-the-shelf x86 applications, making dynamic binary translator (DBT) from CISC to RISC more important. However, dynamic code generation is still inefficient due to the code expansion. Conventional code generators in DBTs use one-to-many mapping scheme between source and target code which cannot take full advantage of the target ISA. We propose a novel lightweight code generation algorithm GSM (Greedy Sub graph Mapping), which can generate compact code with low overhead using many-to-one mapping. GSM is implemented and evaluated in a DBT prototype system called TransARM. Experimental results demonstrate that GSM generates higher quality target code compared to a conventional implementation, which brings code expansion rate close to 1.3. Moreover, GSM causes slightly extra overhead and negligible slowdown of translation, and enables 10% performance improvement for target code execution.","PeriodicalId":213010,"journal":{"name":"2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130617200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

A Multiphase Routing Scheme in Irregular Mesh-Based NoCs 不规则网格noc中的多相路由方案

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.42

Xinming Duan, Yuanyuan Li

{"title":"A Multiphase Routing Scheme in Irregular Mesh-Based NoCs","authors":"Xinming Duan, Yuanyuan Li","doi":"10.1109/PAAP.2011.42","DOIUrl":"https://doi.org/10.1109/PAAP.2011.42","url":null,"abstract":"At present, typical application-specific NoC systems often integrate a number of heterogeneous components which have varied functions, sizes and communication requirements. Instead of regular topology networks, constructing irregular mesh topology network on chip (NoCs) becomes an attractive approach to building future NoC systems with irregular structure. Deadlock-free routing control algorithm is a promising problem for irregular mesh topology. The available routing algorithms from regular mesh are not suitable for irregular mesh network. So in this paper, we introduce a hybrid scheme multiphase routing algorithm for irregular mesh integrating oversized rectangle modules. The basic idea of the scheme is borrowed from the area of fault tolerant networks, where a network topology is rendered irregular due to fault regions. The proposed scheme only employs 2 virtual channels per physical channel with fast routing decisions. In the case that the proposed two-phase routing scheme does not keep connection between some pairs of nodes, certain healthy nodes are deactivated to guarantee its deadlock-freeness. A greedy method is presented to ensure that only the minimum nodes are deactivated.","PeriodicalId":213010,"journal":{"name":"2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123828129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Research on CUDA-Based SIFT Registration of SAR Image 基于cuda的SAR图像SIFT配准研究

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.21

Yang Huang, Jinshuo Liu, Meisheng Tu, Siyuan Li, Juan Deng

引用次数: 8

The Research of Printed Character Recognition Based on Neural Network 基于神经网络的印刷字符识别研究

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.23

Yingqiao Shi, Wenbing Fan, Guodong Shi

引用次数: 7

Block-Level Linkes Based Content Extraction 基于块级链接的内容提取

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.49

Shixing Shen, Hui Zhang

引用次数: 3

The Implementation of Cluster-Based Traffic Simulation System 基于集群的交通仿真系统的实现

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming Pub Date : 2011-12-09 DOI: 10.1109/PAAP.2011.60

Ling Guo, Zhengji Zhou, Jing Xu

引用次数: 0