{"title":"Design and implementation of an AUV for petroleum pipeline inspection","authors":"Y. Tipsuwan, P. Hoonsuwan","doi":"10.1109/ICITEED.2015.7408976","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7408976","url":null,"abstract":"Inspection of petroleum pipelines is very crucial for oil and gas companies. Using a ROV (Remotely Operated Vehicle) for pipeline inspection requires extensive expenses due to heavy equipment and a large number of crew members for operations. In order to save the inspection cost, Kasetsart University and PTTEP have cooperated to conduct a research and development of a specialized AUV (Autonomous Underwater Vehicle). This paper describes a design and implementation of our lab-scale AUV. The AUV is controlled by using a 6-degree-of-freedom PID controller. Sensors used on the AUV include a sonar, a DVL, a pressure sensor, and an altimeter. A software structure of our AUV is based on ROS (Robot Operation System).","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131082928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Five level single phase inverter scheme with fault tolerance for islanded photovoltaic applications","authors":"A. Madhukar Rao, K. Sivakumar","doi":"10.1109/ICITEED.2015.7408940","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7408940","url":null,"abstract":"A fault tolerant single phase five level inverter is proposed in this paper for islanded photovoltaic (PV) generation system. The topology has the capability of maintaining same output voltage magnitude in case of switch open circuit fault and/or source open or short circuit fault with slightly reduced number of voltage levels. This helps in supplying uninterruptable power to essential loads even under fault condition. The topology also has the major advantage of energy balancing between two batteries using redundant switching states. This helps in reducing difference in state of charge (SOC) of batteries during partial shading or hotspots on PV panels. The fault tolerant single phase five-level inverter is simulated using MATLAB/SIMULINK and results are verified with laboratory prototype.","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124153617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jakkrit Dulayatrakul, Pawin Prasertsakul, T. Kondo, I. Nilkhamhang
{"title":"Robust implementation of hand gesture recognition for remote human-machine interaction","authors":"Jakkrit Dulayatrakul, Pawin Prasertsakul, T. Kondo, I. Nilkhamhang","doi":"10.1109/ICITEED.2015.7408950","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7408950","url":null,"abstract":"A robust hand gesture recognition algorithm for remote human-machine interaction is proposed that has been optimized for implementation on an embedded platform. Hue-saturation-value (HSV) thresholding and unit-gradient vector (UGV) background subtraction methods are employed to overcome common issues related to variations in lighting conditions. Top-hat transformation is used to detect fingers and hand gestures, which are translated to command inputs for remotely controlling a media player. Experimental results demonstrate that the algorithm performs efficiently and accurately on an embedded board with an average computational cost of 143 millisecond per gesture and is robust to changes in illumination.","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124374014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hendar Prisnadianta, Suwarno, A. Cavallini, G. Montanari
{"title":"The investigation of copper sulphide effect on paper impregnated oil","authors":"Hendar Prisnadianta, Suwarno, A. Cavallini, G. Montanari","doi":"10.1109/ICITEED.2015.7408938","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7408938","url":null,"abstract":"Recently, a new failure mode has been discovered in kraft paper, which is associated with corrosive sulfur, due to Dibenzyl Disulfide (DBDS) contamination. Simple tests using cylinder-to-plane electrode models were devised to highlight the presence of copper sulphide on paper surface. The purpose of this paper is to investigate the effect of copper sulphide through Partial Discharge (PD) measurement having behavior specifically associated with this type of pollution. The tendency of increasing of copper sulphide deposition on kraft paper insulation was found to be inversely proportional to the Partial Discharge Inception Voltage (PDIV). Breakdown Voltage (BDV) and Dielectric analysis were also considered to achieve a complete understanding of the influence of copper sulphide deposition on paper.","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116446153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reducing battery consumption of data polling and pushing techniques on Android using GZip","authors":"Sirapat Boonkrong, P. C. Dinh","doi":"10.1109/ICITEED.2015.7409011","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7409011","url":null,"abstract":"Nowadays, energy saving solutions have become an interesting topic in all fields of technology, including Android mobile devices. Data polling and data pushing techniques are the two methods used by Android mobile devices to gather and retrieve information from the Internet. Due to the limited amount of battery, there is a need for a way that can help reduce the battery consumption. In order to achieve the objective, this paper proposes that data compression known as GZip is applied to the data before it is sent to the Android mobile device. The results show that the amount of battery used to send data is reduced by approximately 65% and 30% for the data polling and pushing techniques, respectively.","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123682931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Factors of influence in software process improvement: An ISO/IEC 29110 for very-small entities","authors":"N. Wongsai, Veeraporn Siddoo, Rattana Wetprasit","doi":"10.1109/ICITEED.2015.7408904","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7408904","url":null,"abstract":"The recently introduced ISO/IEC 29110 standard Lifecycle profile for Very Small Entities (VSE) has been adopted and practiced in many small and medium software companies, including in Thailand's software industry. Many Thai companies complete their software process improvement (SPI) initiative program and have been certified. There are, however, a number of participants who fail to succeed. This study was concerned with the factors that influence the accomplishment of the standard implementation in various VSE characteristics. In order to achieve this goal, surveying and extracting critical factors from prior studies were carried out and then the surveyed factors were evaluated by the experts' opinion. The analysis of comments and recommendations from the experts was performed using a qualitative content analysis method. This paper presents the initial set of influence factors on both positive and negative impacts of ISO/IEC 29110 implementation. The aim was to help such SPI practitioners with some considerations to manage their approach of adoption appropriately.","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128322223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of time reduction for successive approximation register A/D converter","authors":"Mon Mon Thin, M. M. Than","doi":"10.1109/ICITEED.2015.7408966","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7408966","url":null,"abstract":"Acting as the gateway between the \"real world\" analog signal and digital signal, data converters have become a critical element of modern electronic devices. High-performance applications have put a particular emphasis on high-speed data conversion converters. A variety of converter architectures are being used to reach these higher speeds, each with special advantages. In modern life, the improvements of technologies and design methods have allowed to implement Successive Approximation Register (SAR) analog-to-digital converter (ADC) for higher performance. However, this converter has \"N\" time conversion steps required to digitize a sample for \"N\" bit due to the nature of successive approximation algorithm. To solve this situation, the new high performance architecture based on SAR ADC with charge redistribution DAC is created. In this paper, the proposed system modifies the SAR function to get high speed by reducing the number of bit cycles. Therefore, the proposed architecture can obtain better speed than the conventional architecture.","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127056887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Proposed framework for automatic grading system of ER diagram","authors":"Humasak Simanjuntak","doi":"10.1109/ICITEED.2015.7408930","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7408930","url":null,"abstract":"In this paper we present a preliminary research with proposed framework for automatic grading system of Entity Relationship (ER) Diagram. The proposed framework use ER Diagram in XML file format (XMI file) as an input to the system. There are two proposed approaches. First approach is using Tree Edit Distance algorithm to assess ER Diagram similarity. The output is similarity score and feedback for inputted ER Diagram. Second approach is using machine learning algorithm to build classifier that grade ER Diagram automatically. These two approaches will be implemented and evaluated in the next phase of research.","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128982946","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Development of circular ring antennas for mobile broadband systems","authors":"P. Rakluea, P. Poch","doi":"10.1109/ICITEED.2015.7409004","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7409004","url":null,"abstract":"This paper presents a development of circular ring antennas for mobile broadband systems. The antennas is fed by a 50ohm with two-port micro-strip line elements. The dimension size of antennas is 38×80mm2 with low-cost FR4 substrate. The simulation and experimental result achieve the average gain about 3dBi covering the UWB frequency range 3.1GHz-10.6GHz. The antennas has correlation coefficient average less than 0.1. For far field radiation patterns is omnidirectional in XZ-plane and bi-directional in YZ-plane. The experimental results are in the same trend with the simulation ones. This antennas is suitable for Multiple Input Multiple Output (MIMO) fulfilling in UWB applications.","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129297926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An on-chip delay measurement using adjacency testable scan design","authors":"K. Kato, S. Choomchuay","doi":"10.1109/ICITEED.2015.7409000","DOIUrl":"https://doi.org/10.1109/ICITEED.2015.7409000","url":null,"abstract":"This paper presents a Time to Digital Converter (TDC)-based low cost and high quality on-chip delay measurement with adjacency testable scan design. Adjacency test is useful for on-chip delay measurement with TDC because it can generate arbitrary 1-bit transition to arbitrary input with smaller number of seed vectors. However the area overhead is high because it requires an extra shift register whose length is the same as the number of registers to store seed vectors. The proposed adjacency testable scan design does not require the extra shift register for its Chiba scan-based architecture. Therefore the area overhead is lower. The evaluation shows that the number of sensitizable paths is 7.1 times of that of LOS-based measurement and it is 3.5 times of that of LOC-based measurement. The number of vectors is 56.2% of that of enhanced scan design on average. The area overhead is 49.3% on average, which is the same order of that of enhanced scan design-based measurement.","PeriodicalId":207985,"journal":{"name":"2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132317951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}