Proceedings of the 9th ACM International on Systems and Storage Conference最新文献

{"title":"Using Storage Class Memory Efficiently for an In-memory Database","authors":"Yonatan Gottesman, J. Nider, Ronen I. Kat, Y. Weinsberg, M. Factor","doi":"10.1145/2928275.2933273","DOIUrl":"https://doi.org/10.1145/2928275.2933273","url":null,"abstract":"Storage class memory (SCM) is an emerging class of memory devices that are both byte addressable, and persistent. There are many different technologies that can be considered SCM, at different stages of maturity. Examples of such technologies include NVDIMM-N, PCM, SttRAM, Racetrack, FeRAM, and others. Currently, applications rely on storage technologies such as Flash memory and hard disks as the physical media for persistency. SCM behaves differently and has significantly different characteristics than these existing technologies. That means there is a need for a fundamental change in the way we program data persistency in applications to fully realize the potential of this new class of device. Previous work such as [1] focuses on designing a filesystem optimized to run over SCM memory. Other projects such as Mnemosyne [4] provide a general purpose API for applications to use SCM memory. Mnemosyne however, does not provide a transaction mechanism flexible enough to allow different SCM updates spanning different parts of the code to be considered one transaction. Our work is focused on employing minimal changes needed to retrofit an existing key-value store to take advantage of SCM technology. We demonstrate these changes on Redis (REmote DIctionary Server) [3], which is a popular key-value store. We show how Redis can be modified to take advantage of these new abilities by allowing the application to manage its own storage in a unique way. Our approach is to use two types of memory technologies (DRAM and SCM) for different purposes in a single application. To optimize the system data capacity, we keep a minimal dataset in persistent memory, while keeping metadata (such as indexing) in DRAM, which can be rebuilt upon failures. Persistency in Redis is currently performed by logging all transactions to an append-only log file (AOF). These transactions can then be replayed to recover from a failure. The transactions are not made persistent until the AOF file is flushed to disk, which is very slow. Flushing after every transaction has a performance impact, but flushing periodically creates a risk of lost data. By using SCM instead of a disk, we can effectively flush every transaction without impacting performance. In order to change Redis to store data objects on the SCM, we must ensure consistency of persistent data even after an unexpected shutdown. To ensure consistency, a modified version of dlmalloc [2] is used for all allocations done on the SCM, and mfence commands are used to overcome unexpected reordering. We model the SCM using a memory mapped file backed on a ramdisk. We compared our changes to Redis using an AOF backed on a ramdisk. Although we don't take into account the latency overheads of accessing the SCM, this comparison gives us a good upper bound of performance benefits of using SCM memory. Our results demonstrate an average latency reduction of 43% and average throughput increase of 75%.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"31 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74985204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Software-Defined Emulation Infrastructure for High Speed Storage","authors":"Krishna T. Malladi, M. Awasthi, Hongzhong Zheng","doi":"10.1145/2928275.2933277","DOIUrl":"https://doi.org/10.1145/2928275.2933277","url":null,"abstract":"NVMe, being a new I/O communication protocol, suffers from a lack of tools to evaluate storage solutions built on the standard. In this paper, we provide the design and analysis of a comprehensive, fully customizable emulation infrastructure that builds on the NVMe protocol. It provides a number of knobs that allow system architects to quickly evaluate performance implications of a wide variety of storage solutions while natively executing workloads.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"1 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85421213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Coded Network Switches for Improved Throughput","authors":"Rami Cohen, Yuval Cassuto","doi":"10.1145/2928275.2933281","DOIUrl":"https://doi.org/10.1145/2928275.2933281","url":null,"abstract":"With the increasing demand for network bandwidth, network switches face the challenge of serving growing data rates. To parallelize the process of writing and reading packets to the switch memory, multiple memory units (MUs) are deployed in parallel in the switch fabric. However, memory contention may occur if packets requested to read happen to share one or more MUs, due to memory bandwidth limitations. Avoiding such contention in the write stage is limited as the reading schedule of packets is not known upon arrival of the packets to the switch. Thus, efficient packet placement and read policies are required. For greater flexibility in the read process, coded switches introduce redundancy to the packet-write path. This is done by calculating additional coded chunks from an incoming packet, and writing them along with the original packet chunks to MUs in the switch memory. A coding scheme takes an input of k packet chunks and encodes them into a codeword of n chunks (k ≤ n), where the redundant n --- k chunks are aimed at providing improved read flexibility. Thanks to the redundancy, only a subset of the coded chunks is required for reconstructing the original (uncoded) packet. Thus, packets may be read even when only a part of their chunks is available to read without contention. One natural coding approach is to use [n, k] maximum distance separable (MDS) codes, which have the attractive property that any k chunks taken from the n code chunks can be used for the recovery of the original k packet chunks. Although MDS codes provide the maximum flexibility, we show in our results that good switching performance can be obtained even with much weaker (and lower cost) codes, such as binary cyclic codes. Previous switch-coding works [1],[2] considered a stronger (and more costly) model guaranteeing simultaneous reconstruction of worst-case packet requests. In the coded switching paradigm we propose, our objective is to maximize the number of full packets read from the switch memory simultaneously in a read cycle. The packets to read at each read cycle are specified in a request issued by the control plane of the switch. We show that coding the packets upon their write can significantly increase the number of read packets, in return to a small increase in the write load to store the redundancy. Thus coding can significantly increase the overall switching throughput. We identify and study two key components for high-throughput coded switches: 1) Read algorithms that can recover the maximal number of packets given an arbitrary request for previously written packets, and 2) Placement policies determining how coded chunks are placed in the switch MUs. Our results contribute art and insight for each of these two components, and more importantly, they reveal the tight relations between them. At a high level, the choice of placement policy can improve both the performance and the computational efficiency of the read algorithm. To show the former, we derive a","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"82 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83995251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Helping Protect Software Distribution with PSWD","authors":"Edi Shmueli, Sergey Goffman, Yoram Zahavi","doi":"10.1145/2928275.2928281","DOIUrl":"https://doi.org/10.1145/2928275.2928281","url":null,"abstract":"The success of new technologies depends on whether proper usage models can be found to support them. In this paper we present such a model for Intel's Software Guard Extensions (SGX) -- the leveraging of the technology to provide copy protection to software. We describe the system that we architected, designed and implemented, which transforms, in a fully automated manner, off-the-shelve applications into secured versions that run on top of the enclaves. Our system can be delivered as stand-alone, but also as a layer in existing software copy protection stacks.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"24 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78767207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Flexible Download Time Analysis of Coded Storage Systems","authors":"Q. Shuai, V. Li","doi":"10.1145/2928275.2933278","DOIUrl":"https://doi.org/10.1145/2928275.2933278","url":null,"abstract":"Download time is a key performance metric in distributed storage systems since it greatly impacts user experience, especially for latency-sensitive applications such as Google Search and so on. Recently, plenty of research has pointed out that coding can reduce download time. Till now, almost all previous studies analyze download time when a user requires all the information in a codeword. However, in practical storage systems such as the Windows Azure Storage System (WAS), only when files reach a certain size (e.g., 1GB), will it be a candidate for erasure coding [1]. That is, in practice, files stored in a codeword are usually very large and users' requests may only desire part of these files. Therefore, it is significant to analyze the latency performance when users only request a subset of the erasure-coded content.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"1 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89278171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Optics in Data Centers: Adapting to Diverse Modern Workloads","authors":"S. Vargaftik, I. Keslassy, A. Orda, K. Barabash, Y. Ben-Itzhak, O. Biran, D. Lorenz","doi":"10.1145/2928275.2933283","DOIUrl":"https://doi.org/10.1145/2928275.2933283","url":null,"abstract":"Over the recent years we witness a massive growth of cloud usage, accelerated by new types of 'born-to-the-cloud' workloads. These new types of workloads are increasingly multi-component, dynamic and often present highly intensive communication patterns. Massive innovation of Data Center Network (DCN) technologies is required to support the demand, giving raise to new network topologies, new network control paradigms, and management models. One particularly promising technology candidate for improving the DCN efficiency is Optical Circuit Switching (OCS). Several hybrid solutions combining OCS with the traditional Electronic Packet Switching (EPS) have been proposed [1, 2], aiming to take advantage of the benefits of the OCS technology (e.g., high bandwidth, low latency and power consumption) while leveling out its shortcomings (e.g., slow reconfiguration time, integration with IP fabric). The first comprehensive work advocating OCS for DCN [1] considered HPC workloads with semi-static communication patterns. Follow up works, such as Helios [2], proposed new ways for identifying heavy flows, heuristics for computing the circuits configuration, and control hooks for dispatching the traffic over EPS and OCS paths. In yet newer works, e.g. [3], further advances were made -- supporting richer sets of communication patterns, employing Software Defined Networking (SDN) to steer the traffic and to achieve more reactive control planes in anticipation for faster OCS capabilities, and more. We observe that in hybrid solutions, the basic approach remains the same -- the network is partitioned between the two separate fabrics, one based on OCS and one based on EPS, so that each network flow is handled by one of the fabrics, depending on its properties. In this work, we present a new architecture where optical circuitry does not merely augment the EPS but is properly integrated with it into a coherently managed unified fabric. Our approach is based on understanding that modern workloads impose diverse traffic demands. Specifically, we identify the abundance of few-to-many and many-to-few communication patterns with multiple dynamic hot spots and observe that such traffic is better served by tighter integration of OCS and EPS achieved through introducing composite paths across the OCS-EPS boundaries. As a preliminary proof of concept, we have evaluated our architecture and compared it to the previously proposed hybrid solutions, considering the known uniform and skewed, as well as few-to-many and many-to-few demand models. For each traffic pattern, we evaluate both whether it can be met by each of the solutions and, if yes, the resulting link utilization. Our preliminary results show a significant improvement in both these metrics -- the feasibility and the link utilization. Looking forward, we plan to expand this research and explore a new thread of opportunities for leveraging the reconfiguration capabilities of contemporary OCS, posing it as a viable DCN te","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"23 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87010893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Exploiting Parallelism of Distributed Nested Transactions","authors":"Duane Niles, R. Palmieri, B. Ravindran","doi":"10.1145/2928275.2928287","DOIUrl":"https://doi.org/10.1145/2928275.2928287","url":null,"abstract":"We present SPCN, a framework that further extends the benefits of having distributed partially rollbackable (closed-nested) transactions by exploiting their parallel activation. SPCN provides support for executing each closed-nested transaction in parallel with others belonging to the same parent transaction. Their commit sequence is equivalent to the serial commit execution, but parallelism is leveraged to improve performance by reducing the amount of serial network communication. As we show in our evaluation study using 20 nodes on Amazon EC2 and three well-known benchmarks, SPCN provides performance improvement over the original closed nesting, gaining more than 2× in throughput.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"90 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90599239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"S-RAC: SSD Friendly Caching for Data Center Workloads","authors":"Yuanjiang Ni, Jing Jiang, D. Jiang, Xiaosong Ma, Jin Xiong, Yuangang Wang","doi":"10.1145/2928275.2928284","DOIUrl":"https://doi.org/10.1145/2928275.2928284","url":null,"abstract":"Current data-center applications tend to process increasingly large volume of data sets. The caching effect of page cache is reduced by its limited capacity. Emerging flash-based solid state drives (SSD) have latency and price advantages compared to hard disk and DRAM. Thus, SSD-based caching is widely deployed in data centers. However, SSD caching faces two challenges. First, SSD has limited write endurance, which requires cache manager to reduce write amount to SSD. Second, data-center workloads exhibit a diverse I/O access patterns, which requires one to figure out SSD caching friendly access patterns. This paper first classifies 6 I/O access patterns among 32 data-center workloads using a cost-benefit analysis. We derive implications for designing SSD cache from analyzing the access patterns. We then propose an SSD cache manager S-RAC with re-adding blocks and ghost cache adaptation to retain SSD friendly blocks in SSD. The experimental evaluation shows the efficiency of S-RAC in reducing SSD write amount while improving/maintaining cache hit ratio.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"130 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76755022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Supporting data-driven I/O on GPUs using GPUfs","authors":"Sagi Shahar, M. Silberstein","doi":"10.1145/2928275.2928276","DOIUrl":"https://doi.org/10.1145/2928275.2928276","url":null,"abstract":"Using discrete GPUs for processing very large datasets is challenging, in particular when an algorithm exhibit unpredictable, data-driven access patterns. In this paper we investigate the utility of GPUfs, a library that provides direct access to files from GPU programs, to implement such algorithms. We analyze the system's bottlenecks, and suggest several modifications to the GPUfs design, including new concurrent hash table for the buffer cache and a highly parallel memory allocator. We also show that by implementing the workload in a warp-centric manner we can improve the performance even further. We evaluate our changes by implementing a real image processing application which creates collages from a dataset of 10 Million images. The enhanced GPUfs design improves the application performance by 5.6× on average over the original GPUfs, and outperforms both 12-core parallel CPU which uses the AVX instruction set, and a standard CUDA-based GPU implementation by up to 2.5× and 3× respectively, while significantly enhancing system programmability and simplifying the application design and implementation.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"25 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91237543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Enabling Space Elasticity in Storage Systems","authors":"Helgi Sigurbjarnarson, Pétur Orri Ragnarsson, Juncheng Yang, Ymir Vigfusson, M. Balakrishnan","doi":"10.1145/2928275.2928291","DOIUrl":"https://doi.org/10.1145/2928275.2928291","url":null,"abstract":"Storage systems are designed to never lose data. However, modern applications increasingly use local storage to improve performance by storing soft state such as cached, prefetched or precomputed results. Required is elastic storage, where cloud providers can alter the storage footprint of applications by removing and regenerating soft state based on resource availability and access patterns. We propose a new abstraction called a motif that enables storage elasticity by allowing applications to describe how soft state can be regenerated. Carillon is a system that uses motifs to dynamically change the storage space used by applications. Carillon is implemented as a runtime and a collection of shim layers that interpose between applications and specific storage APIs; we describe shims for a filesystem (Carillon-FS) and a key-value store (Carillon-KV). We show that Carillon-FS allows us to dynamically alter the storage footprint of a VM, while Carillon-KV enables a graph database that accelerates performance based on available storage space.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"16 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84409456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}