Proceedings of the 9th ACM International on Systems and Storage Conference最新文献

{"title":"A study on the errors and uncertainties of file system trace capture methods","authors":"T. Pereira, F. Brasileiro, Lívia M. R. Sampaio","doi":"10.1145/2928275.2928288","DOIUrl":"https://doi.org/10.1145/2928275.2928288","url":null,"abstract":"Despite the popularity of trace-based file system performance evaluation, there is currently no accepted methodology to capture and accurately replay file system traces. The less we know about the limitations of trace-based methodologies, the less we can rely on the obtained results. In this paper, we present a case study analyzing the two most popular trace capture methods. The results of the case study indicate that the two evaluated methods provide good precision, but significant bias in some cases. In addition to providing guidelines on how to improve the quality of trace capture, our results allow us to draw important observations about current practice. We show that bias can be corrected by the execution of a calibration procedure, a practice that is mostly absent in the methodology used in the area. Our results also revealed that, to achieve correct calibration, it is crucial to collect information about the background activity and about the operating system layer running in the experimental environment. Finally, our results allow to quantify the overall trace capture uncertainty, providing means for researches to decide on the suitability of trace capture tools for their purposes.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"34 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91138296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Black box replication: Breaking the latency limits","authors":"Assaf Natanzon, A. Winokur, E. Bachmat","doi":"10.1145/2928275.2928277","DOIUrl":"https://doi.org/10.1145/2928275.2928277","url":null,"abstract":"Synchronous replication is critical for today's enterprise IT organization. It is mandatory by regulation in several countries for some types of organizations, including banks and insurance companies. The technology has been available for a long period of time, but due to speed of light and maximal latency limitations, it is usually limited to a distance of 50-100 miles. Flight data recorders, also known as black boxes, have long been used to record the last actions which happened in airplanes at times of disasters. We present an integration between an Enterprise Data Recorder and an asynchronous replication mechanism, which allows breaking the functional limits that light speed imposes on synchronous replication.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"15 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86447458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Versioned Programming: A Simple Technique for Implementing Efficient, Lock-Free, and Composable Data Structures","authors":"Yang Zhan, Donald E. Porter","doi":"10.1145/2928275.2928285","DOIUrl":"https://doi.org/10.1145/2928275.2928285","url":null,"abstract":"This paper introduces versioned programming, a technique that can be used to convert pointer-based data structures into efficient, lock-free implementations. Versioned programming allows arbitrary composition of pointer modifications. Taking linked-lists as an example, VLISTs, or versioned lists, support features missing in other lock-free implementations, such as double linking and atomic moves among lists. The main idea of versioning is to allow different versions of a nodes exist at the same time such that each thread can pick the appropriate version and has a consistent view of the whole data structure. We present a detailed example of VLISTs, simple enough to include all code inline. The paper also evaluates versioned tree implementations. We evaluate versioned programming against several concurrency techniques. With a modest number of writers, versioned programming outperforms read-log-update, which locks nodes. VLIST out-perform lists with SwissTM, a highquality STM, showing the value of trading some programmer-transparency for performance. Composability hurts performance compared to a non-composable, hand-written lock-free algorithm. Using the technique described in this paper, application developers can have both the performance scalability of sophisticated synchronization techniques with functionality and simplicity comparable to coarse locks.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"49 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84764308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The DragonBeam Framework: Hardware-Protected Security Modules for In-Place Intrusion Detection","authors":"Man-Ki Yoon, Mihai Christodorescu, L. Sha, Sibin Mohan","doi":"10.1145/2928275.2928290","DOIUrl":"https://doi.org/10.1145/2928275.2928290","url":null,"abstract":"The sophistication of malicious adversaries is increasing every day and most defenses are often easily overcome by such attackers. Many existing defensive mechanisms often make differing assumptions about the underlying systems and use varied architectures to implement their solutions. This often leads to fragmentation among solutions and could even open up additional vulnerabilities in the system. We present the DragonBeam Framework that enables system designers to implement their own monitoring methods and analyses engines to detect intrusions in modern operating systems. It is built upon a novel hardware/software mechanism. Depending on the type of monitoring that is implemented using this framework, the impact on the monitored system is very low. This is demonstrated by the use cases presented in this paper that also showcase how the DragonBeam framework can be used to detect different types of attack.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"34 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75174362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IO Core Manager for Virtual Environments","authors":"Eyal Moscovici, Dan Tsafrir, Yossi Kuperman, J. Nider, Razya Ladelsky, Abel Gordon","doi":"10.1145/2928275.2933274","DOIUrl":"https://doi.org/10.1145/2928275.2933274","url":null,"abstract":"Para-virtualization is the leading approach in IO device virtualization. It allows the hypervisor to interpose on and inspect a virtual machine's I/O traffic at run-time. Examples of such interfaces are KVM's virtio [6] and VMWare's VMXNET [7]. Current implementations of virtual I/O in the hypervisor have been shown to have performance and scalability limitations [2, 3, 5]. The overhead incurred during interposition arises from two main sources: VM exits and thread scheduling. VM exits are caused when the virtual machine requires some intervention of the hypervisor in order to continue execution. VM exits are required to perform I/O tasks since the VM does not have direct access to I/O hardware [1]. The second source of overhead is the hypervisor's thread scheduler, which is not aware of the type of work being performed by a particular thread. When executing I/O threads have work (i.e. I/O traffic to process), the scheduler schedules the thread without regard to the latency or throughput requirements of the virtual device. In workloads with a small amount of latency-sensitive traffic, the thread context switches can become prohibitively costly. The limitations can be somewhat mitigated by using the side-core [4] approach, which divides the system cores into two distinct sets: one for running VM guests, and the other dedicated to virtual I/O processing. However, the number of cores that should be assigned to each set is dependent on the constantly changing workload. For optimum performance, the resources must be allocated according to measurements taken at runtime. We present IOcm which is able to tune the system automatically for using the side-core approach. IOcm provides a better foundation for building practical systems using the side-core approach by improving its usability. IOcm includes mechanisms that expose statistics and controls that allow for better management of the system. We show that IOcm is able to provide comparable performance to a side-core system tuned by an oracle.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"22 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82280464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Memory-Aware Management for Multi-Level Main Memory Complex using an Optimization of the Aging Paging Algorithm","authors":"Gal Oren, Leonid Barenboim, Lior Amar","doi":"10.1145/2928275.2933276","DOIUrl":"https://doi.org/10.1145/2928275.2933276","url":null,"abstract":"Memory and storage are often assumed to be unsophisticated, flat resources, with simple properties, such as a constant access time. Over the years this assumption has been proven to be wrong, and understanding of the memory hierarchy could be useful in order to enhance the performance of an algorithm or a data structure [1]. For example, the Storage Class Memory (SCM) is a new technology which represents a new hybrid form of storage and memory with uniqe characteristics, meaning a memory which is non-volatile, cheap in per bit cost, has fast access times for both read and writes using cache line access, and is solid state. Also, the SCM is supposed to have different versions with different access speeds and volumes, meaning that it might be possible to add different SCM devices to the memory hierarchy as an extension of the RAM, and manage this enlarged main memory complex using special algorithms [2]. A combination between the SCM technology and a designated Memory Allocation Manager (MAM) that will allow the developer to manually control the different memories will be likely to achieve a new level of performance for memory-aware data structures. However, although the manual MAM seems to be the optimal approach for multilevel main memory complex management, this technique is still very far from being realistic because of several reasons, and the chances that it would be implemented in current codes using High Performance Computing (HPC) platforms is quite low. This premise means that the most reasonable way to introduce the SCM into any usable memory system would be by implementing an automated version of the MAM using the fundamentals of the paging algorithms, as used for a standard memory hierarchy. Our hypothesis is that achieving appropriate transferability between these new main memory complex levels may be possible using ideas of algorithms employed in current virtual memory systems, and that the memory-aware adaptation of those algorithms to a multi-level main memory complex is possible. We investigated various paging algorithms, and found the ones that could be adapted successfully from a standard memory hierarchy to a hierarchy with multi-level main memory complex. We discovered that using a memory-aware adaptation of the Aging paging algorithm results in the best performances in terms of Hit / Miss ratio and access speed. Specifically, we show that this modification can improve the access speed of the main memory complex by about 75%, and that the new algorithm manages to achieve the same or better Hit / Miss ratio in almost all cases in comparison to the current alternatives.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"331 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76577309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Health-Binning: Maximizing the Performance and the Endurance of Consumer-Level NAND Flash","authors":"R. Pletka, Sasa Tomic","doi":"10.1145/2928275.2928279","DOIUrl":"https://doi.org/10.1145/2928275.2928279","url":null,"abstract":"In recent years, the adoption of NAND flash in enterprise storage systems has been progressing rapidly. Todays all-flash storage arrays exhibit excellent I/O throughput, latency, storage density, and energy efficiency. However, the advancements in NAND technology are driven mostly by the consumer market, which makes NAND flash manufacturers focus primarily on reducing cost ($/GiB) and increasing the storage density by technology node scaling, by increasing the number of bits stored per cell, and by stacking cells vertically (3D-NAND). This comes at the cost of reduced endurance of the raw NAND flash, larger variations across blocks, and longer latencies, especially with extremely high error rates (due to the use of read-retry operations). In this paper, we present Health Binning, a technique that facilitates bringing low-cost consumer-level flash to the quality required for enterprise-level storage systems. Health Binning determines the wear characteristics of each block in the background and uses this information in the data-placement process to map hotter data to healthier blocks and colder data to less healthy blocks. Health Binning significantly improves the endurance and performance of the storage system: It actively narrows the block wear distribution and moves endurance from being dictated by the worst blocks towards to a value corresponding to the average endurance of all blocks, resulting in up to 80% enhanced endurance compared with other wear-leveling schemes. At the same time, the probability of reads with high raw bit error rates (RBER) is reduced, thereby decreasing the number of read-retry operations throughout the device lifetime.","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"19 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91327980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Proceedings of the 9th ACM International on Systems and Storage Conference","authors":"","doi":"10.1145/2928275","DOIUrl":"https://doi.org/10.1145/2928275","url":null,"abstract":"","PeriodicalId":20607,"journal":{"name":"Proceedings of the 9th ACM International on Systems and Storage Conference","volume":"31 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81190770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}