2015 2nd International Conference on Electronics and Communication Systems (ICECS)最新文献_第4页

Home assistant: An ease to home & patient's 家庭助理:为家庭和病人提供便利

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7124826

Prasun Shrivastava, Vikram Lodhi, Abhishek Chauhan, Rishabh Sharma

引用次数: 0

Dual tree DWT analysis based electrocardiogram signal compression using zero coding technique 基于双树DWT分析的心电图信号零编码压缩技术

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7124983

Ranjeet Kumar, Anil Kumar

引用次数: 7

Closed loop control system modeling of Permanent Magnet Brushless DC Motor 永磁无刷直流电动机闭环控制系统建模

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7125019

A. N. Subramonium, Prakhyath Shetty, M. Kumar

引用次数: 2

Low power SVM module using spurious power suppression technique 低功耗支持向量机模块采用伪功率抑制技术

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7124940

R. Ravanya, S. Ramya

引用次数: 0

Simulation analysis of power quality improvement in BLDC motor drive using type III CUK derived converter 采用III型CUK衍生变换器改善无刷直流电机驱动电能质量的仿真分析

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7124838

J. Catherine, R. Murugan

引用次数: 1

Spatial fuzzy C-means clustering based segmentation on CT images 基于空间模糊c均值聚类的CT图像分割

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7124937

A. Sajith, S. Hariharan

引用次数: 5

GSAWM for beamforming and directivity of linear antenna arrays 线性天线阵列波束形成和指向性的GSAWM

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7124846

G. Ram, P. Chakravorty, D. Mandal, R. Kar, S. Ghoshal

{"title":"GSAWM for beamforming and directivity of linear antenna arrays","authors":"G. Ram, P. Chakravorty, D. Mandal, R. Kar, S. Ghoshal","doi":"10.1109/ECS.2015.7124846","DOIUrl":"https://doi.org/10.1109/ECS.2015.7124846","url":null,"abstract":"In this paper, a new evolutionary optimization algorithm named gravitational search algorithm with wavelet mutation (GSAWM) is adopted for optimal design of hyper beam pattern of linear antenna arrays. Hyper beam is derived from sum and difference beam patterns associated with hyper beam exponent parameter for the array. In GSAWM, particles are considered as objects and their performances are measured by their masses. All these objects attract each other by gravity forces, and these forces produce global movements of all objects towards the objects with heavier masses. GSAWM guarantees the exploitation step of the algorithm and it is apparently free from premature convergence. Extensive simulation results justify superior optimization capability of GSAWM over the aforementioned optimization techniques. By optimization of current excitation weights and uniform inter-element spacing, GSAWM achieves optimized hyper beam with much greater reduction in side lobe level (SLL), improved directivity and much more improved first null beam width (FNBW), keeping the same value of hyper beam exponent. The whole simulation experiment has been performed for 10-, 14-, and 20-element linear antenna arrays.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125301631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Design and simulation of longitudinal autopilot modes for a conventional aircraft 传统飞机纵向自动驾驶模式的设计与仿真

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7124738

K. David Solomon Raj, P. R. Kumar

{"title":"Design and simulation of longitudinal autopilot modes for a conventional aircraft","authors":"K. David Solomon Raj, P. R. Kumar","doi":"10.1109/ECS.2015.7124738","DOIUrl":"https://doi.org/10.1109/ECS.2015.7124738","url":null,"abstract":"This paper is concerned with design of an autopilot for longitudinal flight control of a conventional airplane. There are different modes of automatic longitudinal flight controls. Among those pitch attitude hold, altitude hold and vertical speed hold mode autopilots are implemented in which controller is designed for each of these modes. By the use of this controller, the system performance is improved. The performance requirements such as the peak overshoot to be less than 15% and the rise time to be less than 1 second has been achieved by the use of each controller in different modes. Traditional control techniques such as PID controller and Lead-Lag controllers are designed to each of these autopilot modes. Root-locus design technique is applied for tuning the parameters of each controller. Simulation of autopilots in the presence of three different types of atmospheric disturbances such as Dryden wind gust, Vertical wind gust model and turbulence are also observed. As in effect due to disturbance on each mode, a pitch rate feedback is applied in the inner loop of pitch controller. So a feedback control loop is developed to design the autopilot.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125496012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Design of planar multi-ring monopole antenna for UWB applications 面向超宽带应用的平面多环单极天线设计

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7124991

M. Geethananda, Z. C. Alex, K. Shambavi

引用次数: 2

High speed low power 64-bit comparator designed using current comparison based domino logic 高速低功耗64位比较器设计使用当前比较基于domino逻辑

2015 2nd International Conference on Electronics and Communication Systems (ICECS) Pub Date : 2015-06-18 DOI: 10.1109/ECS.2015.7124848

A. Manikandan, J. Ajayan, C. K. Arasan, S. Karthick, K. Vivek

{"title":"High speed low power 64-bit comparator designed using current comparison based domino logic","authors":"A. Manikandan, J. Ajayan, C. K. Arasan, S. Karthick, K. Vivek","doi":"10.1109/ECS.2015.7124848","DOIUrl":"https://doi.org/10.1109/ECS.2015.7124848","url":null,"abstract":"The rapid growth in CMOS technology with the shrinking device size towards 22 nm has allowed for placement of billions of transistors on a single microprocessor chip. To achieve very high system performance, domino logic styles are widely employed in high performance VLSI chips together with aggressive technology scaling. Comparators are widely used in central processing units (CPUs) and microcontrollers (MCUs). In this paper, a 64 bit comparator circuit is proposed which has a lower leakage and higher noise immunity without dramatic speed degradation compared to high speed domino logic, leakage current replica keeper domino logic and diode footed domino logic. This circuit is based on comparison of mirrored current of the pull up network (PUN) with its worst case leakage current. Current comparison based domino technique reduces the parasitic capacitance on the dynamic node using a small keeper transistor, which reduces the contention current, power consumption and also the delay of the circuit. Simulation results of 64 bit comparator designed using a 22nm high performance predictive technology model demonstrate 51% power reduction compared to a standard domino circuits for 64 bit comparator.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132333044","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10