Low power SVM module using spurious power suppression technique

Abstract

A biometric system makes a pattern recognition decision in accordance with the biometric features extracted from a human being. This paper presents a text-independent speaker Verification system using support vector machines (SVMs) is to identify the speaker by listening to the voice of the speaker. Thus speaker verification is to determine whether a test utterance is spoken by a target speaker and also causes large power dissipation. In this paper, Spurious Power Suppression Technique (SPST) is utilized to overcome these issues, which uses a detection logic circuit to detect the effective data range of arithmetic units, e.g., adders or multipliers. This SPST is used to reduce the power dissipation when compared to previous method.