{"title":"Using audio on the Internet for training purposes","authors":"R. A. Salazar","doi":"10.1109/SOUTHC.1996.535059","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535059","url":null,"abstract":"Nova Southeastern University has been delivering interactive distance learning courses since the mid-80s. With the World Wide Web as one of the fastest growing media for the transportation of multimedia information, the University is looking into Internet related technologies to improve the interactive distance learning environment. The purpose of this paper is to present the experience gained in designing, developing, and implementing a distance course using audio on the World Wide Web. One important point is that the instructor/developer of the course needs to have a working knowledge of distance learning and World Wide Web concepts.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"67 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132792215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Constructing a fuzzy controller","authors":"G. Viot","doi":"10.1109/SOUTHC.1996.535112","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535112","url":null,"abstract":"The author illustrates the structure and operation of a fuzzy-based setpoint controller. However, the presented structure is abstracted from implementation details, such as data structures and algorithms. These kinds of low level details are important, especially when incorporating fuzzy in low-cost, mass-produced products. The RLC circuit shown is used to examine an interesting control problem.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133331314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Optimal synthesis of digital counter","authors":"H. Javan, V. Rayaravivarma","doi":"10.1109/SOUTHC.1996.535107","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535107","url":null,"abstract":"This paper presents a unified and systematic approach to the analysis and synthesis of digital counters. Our method consists, firstly of analysing a given 3 bit counter to develop the state diagram and to investigate the possibility of hangup states. Based on this, we then synthesized a given logic function. Different synthesis methods are discussed, compared, and finally, an optimum circuit meeting the design specifications is selected.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134109456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Proposed power electronics curriculum","authors":"I. Batarseh, A. Gonzalez, Z. Qu, A. Khan","doi":"10.1109/SOUTHC.1996.535074","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535074","url":null,"abstract":"In this paper, an attempt is made to present undergraduate and graduate curricula in the field of power electronics. This includes detailed class contents for power electronics I & II and associated laboratory assignments for the first course. This work is motivated by the current efforts under way at the University of Central Florida (USA) to develop the power program in the Electrical and Computer Engineering Department. Based on the recent NSF Workshop on power electronics education, this paper also sheds some light into the educational aspects of the field of power electronics. Finally, an outline for the hardware laboratory as supporting facility for effective power electronics education is also addressed.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130109858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Software engineering curriculum issues","authors":"G. Walton","doi":"10.1109/SOUTHC.1996.535072","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535072","url":null,"abstract":"A software engineering curriculum must provide the student with: a strong mathematical and theoretical base; problem solving and analysis skills; written and oral communication skills; knowledge of and experience in software engineering principles, processes, and products; knowledge of and experience in measurement, analysis, and control of software processes and products; and an understanding of applicable societal and ethical issues. To effectively address the needs of industry, software engineering education must include experience of applying software engineering principles to nontrivial problems. Here, the author describes how, in an environment of rapidly changing technology and limited educational budgets, delivering a sufficiently robust software engineering educational experience is a challenge.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131846432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Intelligent peripheral modules and applications performed by modular microcontrollers","authors":"C. Melear","doi":"10.1109/SOUTHC.1996.535108","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535108","url":null,"abstract":"Microcontrollers of the M68300 and M68HC16 families are built in a modular fashion. These microcontrollers are designed with modules that communicate with other on-chip modules through an intermodule bus. This bus is a silicon bus that is not available outside the chip itself. It is only used between the various modules on a particular implementation of the processor family being discussed in this paper. The intermodule bus is composed of the address and data buses, the interrupt lines and associated interrupt acknowledgement lines along with certain interrupt arbitration circuitry. Using this modular concept, modules can be rapidly assembled to form new derivatives of one of these processor families. Much of the work of implementing a new derivative is simply done with CAD (Computer Aided Design) tools. Still there is considerable work in designing the periphery of the chip so that bonding pads will be properly spaced. However, the focus of this paper is on programming the individual modules.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"2011 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130906153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Basic differential cascode voltage switch (DCVS) circuits with functional and scan load","authors":"D.M. Wu, F. Thoma, J. Davis","doi":"10.1109/SOUTHC.1996.535090","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535090","url":null,"abstract":"This paper describes a basic DCVS (Differential Cascode Voltage Switch) which can be used as a uniform basis for constructing DCVS logic circuits, register latch circuits and circuits which can be conditioned individually to function as either or both DCVS logic and register latch.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134194689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"RF design for multi-carrier wireless systems","authors":"M. A. Komara","doi":"10.1109/SOUTHC.1996.535050","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535050","url":null,"abstract":"This paper provides an overview of the broadband multi-carrier system evolution and design challenges faced in the RF equipment areas for broadband wireless/cellular.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114126920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An advanced layered MPP architecture for industrial imaging","authors":"B. S. Farroha, R. G. Deshmukh","doi":"10.1109/SOUTHC.1996.535082","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535082","url":null,"abstract":"The massively parallel hardware approach to computer vision is a relatively new area. The traditional approach uses a parallel general-purpose computer that runs software to take advantage of the parallel processors. The number of parallel processors has varied from two up to a processor per pixel, at least in theory. The proposed approach is ideologically different. This research advocates the processing to be accomplished in layers that are totally parallel, especially at the lower levels. This approach uses dedicated hardware architectures, as opposed to the general-purpose processor, which are customer-oriented and application specific in nature. The system is composed of a new image layer, local communicator layer, processing element layer, and a main control unit. The PE design is facilitated by the development of a CAD designer tool. The goals of this research are to reduce PE complexity, reduce communication bottlenecks, provide for higher speed and throughput, and provide accessibility to portability requirements. The issues that require consideration includes: speed, throughput, system flexibility, system tolerance, and portability. This is why it is critical to determine at what stage of the VLSI design the designer should start to consider these effects. This research proposes to solve the aforementioned problems, in addition to presenting the advantages of the application-specific massively parallel hardware architecture for image recognition systems. This paper presents the background and developments, the technical summary, recommended areas of application, and conclusion.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"684 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116213415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Threshold-based congestion control in ATM networks","authors":"M. Ilyas, Y. Alsaka","doi":"10.1109/SOUTHC.1996.535041","DOIUrl":"https://doi.org/10.1109/SOUTHC.1996.535041","url":null,"abstract":"In this paper, we present the simulation of a call oriented congestion avoidance technique in ATM networks for B-ISDN. This technique belongs to the category of preventive congestion avoidance techniques. To keep things simple and minimize the overhead, we do not maintain a separate threshold for different types of services. We assume that an incoming call is accepted if its resource requirement is not more than X percentage of the remaining resources at any of the points along the route of this call. The resource requirements include the bandwidth and buffer requirements. Therefore, if a call is to use more than X percentage of the available resources, the call will be blocked. Otherwise the call will be accepted. This scheme is very simple and is effective at the same time.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127666498","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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