2019 19th Non-Volatile Memory Technology Symposium (NVMTS)最新文献

Scalability Study on Ferroelectric-HfO2 Tunnel Junction Memory Based on Non-equilibrium Green Function Method 基于非平衡格林函数法的铁电- hfo2隧道结存储器可扩展性研究

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/NVMTS47818.2019.8986219

Fei Mo, Yusaku Tagawa, T. Saraya, T. Hiramoto, M. Kobayashi

引用次数: 9

A novel memory test system with an electromagnet for STT-MRAM testing 一种用于STT-MRAM测试的新型电磁铁记忆测试系统

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/NVMTS47818.2019.8986200

R. Tamura, N. Watanabe, H. Koike, Hideo Sato, Shoji Ikeda, T. Endoh, S. Sato

引用次数: 1

Functionality Enhanced Memories for Edge-AI Embedded Systems Edge-AI嵌入式系统的功能增强存储器

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/NVMTS47818.2019.8986214

A. Levisse, M. Rios, W. Simon, P. Gaillardon, David Atienza Alonso

{"title":"Functionality Enhanced Memories for Edge-AI Embedded Systems","authors":"A. Levisse, M. Rios, W. Simon, P. Gaillardon, David Atienza Alonso","doi":"10.1109/NVMTS47818.2019.8986214","DOIUrl":"https://doi.org/10.1109/NVMTS47818.2019.8986214","url":null,"abstract":"With the surge in complexity of edge workloads, it appeared in the scientific community that such workloads cannot be anymore overflown to the cloud due to the huge edge device to server communication energy cost and the high energy consumption induced in high end server infrastructure. In this context, edge devices must be able to efficiently process complex data-intensive workloads bringing in the concept of Edge AI. However, current architectures show poor energy efficiency while running data intensive workloads. While the community looks toward the integration of new memory architectures using emerging resistive memories and new specific accelerators, we propose a new concept to boost the energy efficiency of Edge systems running data intensive workloads: Functionality Enhanced Memories (FEM). FEM consist on a memory architecture with new functionalities at a decent area overhead cost. In this work, we demonstrate the feasibility of native transpose access for 1Transistor-1RRAM bitcells leveraging three independent gates transistors. Based on that, we thereby propose a concept of FEM-enabled Edge system embedding the proposed native transpose access RRAM-based memory architecture and an in-SRAM computing architecture (the BLADE).","PeriodicalId":199112,"journal":{"name":"2019 19th Non-Volatile Memory Technology Symposium (NVMTS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127987201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

NVMTS 2019 Copyright Page NVMTS 2019版权页面

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/nvmts47818.2019.8986155

引用次数: 0

Ferroelectric Hf1-xZrxO2 memories: device reliability and depolarization fields 铁电Hf1-xZrxO2存储器:器件可靠性和去极化场

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/NVMTS47818.2019.9043368

P. Lomenzo, S. Slesazeck, M. Hoffmann, T. Mikolajick, U. Schroeder, B. Max

引用次数: 20

Non-filamentary non-volatile memory elements as synapses in neuromorphic systems 非丝状非易失性记忆元件在神经形态系统中的突触作用

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/NVMTS47818.2019.8986194

Alessandro Fumarola, Y. Leblebici, P. Narayanan, R. Shelby, L. L. Sanchez, G. Burr, Kibong Moon, J. Jang, H. Hwang, Severin Sidler

{"title":"Non-filamentary non-volatile memory elements as synapses in neuromorphic systems","authors":"Alessandro Fumarola, Y. Leblebici, P. Narayanan, R. Shelby, L. L. Sanchez, G. Burr, Kibong Moon, J. Jang, H. Hwang, Severin Sidler","doi":"10.1109/NVMTS47818.2019.8986194","DOIUrl":"https://doi.org/10.1109/NVMTS47818.2019.8986194","url":null,"abstract":"Crossbar arrays of non-volatile memory (NVM) devices represent one possible path for implementing highly energy-efficient neuromorphic computing systems. For Deep Neural Networks (DNN), where information can be encoded as analog voltage and current levels, such arrays can represent matrices of synaptic weights, implementing the matrix-vector multiplication needed for algorithms such as backpropagation in a massively-parallel fashion. Previous research demonstrated a large-scale hardware-software implementation based on phase-change memories and analyzed the potential speed and power advantages over GPU-based training. In this proceeding we will discuss extensions of this work leveraging a different class of memory elements. Using the concept of jump-tables we simulate the impact of real conductance response of non-filamentary resistive devices based on ${P} r_{0}.{}_{3}Ca_{0.7}$ Mn $O_{3}$ (PCMO). With the same approach as of [1], we simulate a three-layer neural network with training accuracy >90% on the MNIST dataset. The higher ON/OFF conductance ratio of improved Al[Mo/PCMO devices together with new programming strategies can lead to further accuracy improvement. Finally, we show that the bidirectional programming of Al[Mo/PCMO can be used to implement high-density neuromorphic systems with a single conductance per synapse, at only a slight degradation to accuracy.","PeriodicalId":199112,"journal":{"name":"2019 19th Non-Volatile Memory Technology Symposium (NVMTS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133677492","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Reliability of 3D NAND flash memory with a focus on read voltage calibration from a system aspect 3D NAND闪存的可靠性，从系统角度关注读取电压校准

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/NVMTS47818.2019.8986221

N. Papandreou, Nikolas Ioannou, Thomas P. Parnell, R. Pletka, M. Stanisavljevic, R. Stoica, Sasa Tomic, H. Pozidis

引用次数: 8

Investigating Dynamic Minor Loop of Ferroelectric Capacitor 铁电电容器动态小回路研究

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/NVMTS47818.2019.8986179

Panni Wang, Zheng Wang, Nujhat Tasneem, J. Hur, A. Khan, Shimeng Yu

{"title":"Investigating Dynamic Minor Loop of Ferroelectric Capacitor","authors":"Panni Wang, Zheng Wang, Nujhat Tasneem, J. Hur, A. Khan, Shimeng Yu","doi":"10.1109/NVMTS47818.2019.8986179","DOIUrl":"https://doi.org/10.1109/NVMTS47818.2019.8986179","url":null,"abstract":"In-memory computing with emerging non-volatile memories (NVMs) can accelerate the deep neural networks (DNNs) by parallelizing vector-matrix multiplication (VMM) operations in the analog domain. Hafnium Zirconium Oxide (HZO) based ferroelectric field-effect transistor (FeFET) shows great promise as a synaptic device for neuromorphic computing. The FeFET channel conductance could be tuned to map the weights in the neural network. DNNs’ weight update rules require that the weight of each synapse can be increased and decreased with multilevel states, which can be realized by applying positive or negative voltage pulses to change the polarization states of the HZO material. Therefore, HZO is expected to work on the minor loop instead of only working on the saturation loop of the ploarizion-voltage (P-V) hysteresis loop. To investigate the minor loop and partial switching dynamics, a TiN/HZO (10 nm, Hf:Zr=1:1)/TiN capacitor structure was fabricated by atomic layer deposition (ALD) with post-annealing. We established a testing protocol to measure the real-time polarization response corresponding to the voltage sequence applied. The results show that the polarity change increases by increasing the pulse amplitude and pulse width. Therefore, tuning the gate pulse amplitude and width could achieve multi-states of FeFET channel conductance.","PeriodicalId":199112,"journal":{"name":"2019 19th Non-Volatile Memory Technology Symposium (NVMTS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128462125","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Novel Quantum Dot Based Memories with Many Days of Storage Time : Last Steps towards the Holy Grail? 具有多天存储时间的新型量子点存储器:迈向圣杯的最后一步?

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/NVMTS47818.2019.8986178

D. Bimberg, T. Mikolajick, X. Wallart

引用次数: 3

NVMTS 2019 TOC

2019 19th Non-Volatile Memory Technology Symposium (NVMTS) Pub Date : 2019-10-01 DOI: 10.1109/nvmts47818.2019.8986212

引用次数: 0