Investigating Dynamic Minor Loop of Ferroelectric Capacitor

In-memory computing with emerging non-volatile memories (NVMs) can accelerate the deep neural networks (DNNs) by parallelizing vector-matrix multiplication (VMM) operations in the analog domain. Hafnium Zirconium Oxide (HZO) based ferroelectric field-effect transistor (FeFET) shows great promise as a synaptic device for neuromorphic computing. The FeFET channel conductance could be tuned to map the weights in the neural network. DNNs’ weight update rules require that the weight of each synapse can be increased and decreased with multilevel states, which can be realized by applying positive or negative voltage pulses to change the polarization states of the HZO material. Therefore, HZO is expected to work on the minor loop instead of only working on the saturation loop of the ploarizion-voltage (P-V) hysteresis loop. To investigate the minor loop and partial switching dynamics, a TiN/HZO (10 nm, Hf:Zr=1:1)/TiN capacitor structure was fabricated by atomic layer deposition (ALD) with post-annealing. We established a testing protocol to measure the real-time polarization response corresponding to the voltage sequence applied. The results show that the polarity change increases by increasing the pulse amplitude and pulse width. Therefore, tuning the gate pulse amplitude and width could achieve multi-states of FeFET channel conductance.