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7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.最新文献

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Long fat pipe congestion control for multi-stream data transfer 多流数据传输的长胖管道拥塞控制
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1109/ISPAN.2004.1300495
Makoto Nakamura, Hiroyuki Kamezawa, J. Tamatsukuri, M. Inaba, K. Hiraki, K. Mizuguchi, K. Torii, S. Nakano, Shizuo Yoshita, Ryutaro Kurusu, Masakazu Sakamoto, Yuki Furukawa, Takeshi Yanagisawa, Yukichi Ikuta, J. Shitami, A. Zinzaki
{"title":"Long fat pipe congestion control for multi-stream data transfer","authors":"Makoto Nakamura, Hiroyuki Kamezawa, J. Tamatsukuri, M. Inaba, K. Hiraki, K. Mizuguchi, K. Torii, S. Nakano, Shizuo Yoshita, Ryutaro Kurusu, Masakazu Sakamoto, Yuki Furukawa, Takeshi Yanagisawa, Yukichi Ikuta, J. Shitami, A. Zinzaki","doi":"10.1109/ISPAN.2004.1300495","DOIUrl":"https://doi.org/10.1109/ISPAN.2004.1300495","url":null,"abstract":"We point out a problem of the congestion control mechanism of TCP on the long fat pipe network (LFN) by precise analysis using our hand-made tools, and propose a congestion control algorithm for parallel streams and packet spacing algorithm in slow start phase for LFN. This paper presents: (1) observation of TCP/IP multi-stream data transfer across 7500 miles, (2) analysis tools for congestion problem; i.e., packet logging tool and pseudo LFN emulator, (3) pseudo LFN experiments, and (4) modification of congestion control algorithm, balancing parallel streams with TCP fairness and TCP compatibility and packet spacing.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117351597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Matrix factorizations for parallel integer transforms 并行整数变换的矩阵分解
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1109/ISPAN.2004.1300489
Yiyuan She, Pengwei Hao, Y. Paker
{"title":"Matrix factorizations for parallel integer transforms","authors":"Yiyuan She, Pengwei Hao, Y. Paker","doi":"10.1109/ISPAN.2004.1300489","DOIUrl":"https://doi.org/10.1109/ISPAN.2004.1300489","url":null,"abstract":"Integer mapping is critical for lossless source coding and the techniques have been used for image compression in the new international image compression standard, JPEG 2000. In this paper, from block factorizations for any nonsingular transform matrix, we introduce two types of parallel elementary reversible matrix (PERM) factorizations which are helpful for the parallelization of perfectly reversible integer transforms. With improved degree of parallelism (DOP) and parallel performance, the cost of multiplication and addition can be respectively reduced to O(logN) and O(log2N) for an N-by-N transform matrix. These make PERM factorizations an effective means of developing parallel integer transforms for large matrices. Besides, we also present a scheme to block the matrix and allocate the load of processors for efficient transformation.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133098547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A marking scheme using Huffman codes for IP traceback 一种利用霍夫曼码进行IP溯源的标记方案
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1109/ISPAN.2004.1300516
K. Choi, H. K. Dai
{"title":"A marking scheme using Huffman codes for IP traceback","authors":"K. Choi, H. K. Dai","doi":"10.1109/ISPAN.2004.1300516","DOIUrl":"https://doi.org/10.1109/ISPAN.2004.1300516","url":null,"abstract":"In (distributed) denial of service attack ((D)DoS), attackers send a huge number of packets with spoofed source addresses to disguise themselves toward a target host or network Various IP traceback techniques such as link testing, marking, and logging to find out the real source of attacking packets have been proposed. We present a marking scheme (with marking and traceback algorithms) in which a router marks a packet with a link that the packet came through. Links of a router are represented by Huffman codes according to the traffic distribution among the links. If the packet runs out of space allotted for the marking field in the packet header, then the router stores the marking field in the router's local memory along with a message digest of the packet. We analyze the memory requirement of routers to store marking fields, compare the scheme with other existing techniques, and address practical issues to deploy the scheme in the Internet. The scheme marks every packet, therefore IP traceback can be accomplished with only a packet unlike in probabilistic markings; also it requires far less amount of memory compared to logging methods and is robust in case of DDoS.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121754252","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 61
Pancyclicity on Mobius cubes with edge faults 带边缘断层的莫比乌斯立方体的全循环性
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1109/ISPAN.2004.1300476
S. Hsieh, Chun-Hua Chen
{"title":"Pancyclicity on Mobius cubes with edge faults","authors":"S. Hsieh, Chun-Hua Chen","doi":"10.1109/ISPAN.2004.1300476","DOIUrl":"https://doi.org/10.1109/ISPAN.2004.1300476","url":null,"abstract":"A graph G = (V, E) is said to be pancyclic if it contains cycles of all lengths from 4 to |V| in G. Let F/sub e/ be the set of faulty edges. In this paper, we show that an n-dimensional Mobius cube, n /spl ges/ 1, contains a fault-free Hamiltonian path when |F/sub e/| /spl les/ n-1. We also show that an n-dimensional Mobius cube, n /spl ges/ 2, is pancyclic when |F/sub e/| /spl les/ n-2. Since an n-dimensional Mobius cube is regular of degree n, both results are optimal in the worst case.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122412312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bounds on the client-server incremental computing 客户端-服务器增量计算的边界
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1093/ietfec/e89-a.5.1198
Cho-Chin Lin, Da-Wei Wang, T. Hsu
{"title":"Bounds on the client-server incremental computing","authors":"Cho-Chin Lin, Da-Wei Wang, T. Hsu","doi":"10.1093/ietfec/e89-a.5.1198","DOIUrl":"https://doi.org/10.1093/ietfec/e89-a.5.1198","url":null,"abstract":"We discuss the problem of finding a dominating sequence for sending the input data items from a low-end client to a server for computational intensive tasks under the realistic assumption of unpredictable communication behaviors. Under the assumption, the client sends the input data items using a specified sequence to maximum the number of computations performed at the server at any moment. The sequence-finding problem is NP-hard for the general case. In this paper, we address two fundamental and useful applications: matrix multiplication and fast Fourier transform. We have shown that the sequence-finding problems of the applications can be solved optimally in linear time. However, we have also shown counter examples to rule out any possibility of finding a dominating sequence for the sparse cases. Finally, a simulation is conducted to show the correctness and usefulness of our results.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128491407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Computing the rupture degrees of graphs 计算图的破裂度
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1109/ISPAN.2004.1300507
Fengwei Li, Xueliang Li
{"title":"Computing the rupture degrees of graphs","authors":"Fengwei Li, Xueliang Li","doi":"10.1109/ISPAN.2004.1300507","DOIUrl":"https://doi.org/10.1109/ISPAN.2004.1300507","url":null,"abstract":"The rupture degree of a noncomplete connected graph G is defined by r(G) = max{/spl omega/(G - X) - |X| - m(G - X) : X /spl sub/ V(G), /spl omega/(G - X) /spl ges/ 2}, where /spl omega/(G - X) denotes the number of components in the graph G - X. For a complete graph K/sub n/, we define r(K/sub n/) = 1 - n. This parameter can be used to measure the vulnerability of a graph. To some extent, it represents a trade-off between the amount of work done to damage the network and how badly the network is damaged. In this paper, we prove that the problem of computing the rupture degree of a graph is NP-complete. We obtain the rupture degree of the Cartesian product of some special graphs and also give the exact values or bounds for the rupture degrees of Harary graphs.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129598965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
Processor mapping technique for communication free data redistribution on symmetrical matrix 对称矩阵上无通信数据重分配的处理器映射技术
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1109/ISPAN.2004.1300483
Ching-Hsien Hsu, Kun-Ming Yu
{"title":"Processor mapping technique for communication free data redistribution on symmetrical matrix","authors":"Ching-Hsien Hsu, Kun-Ming Yu","doi":"10.1109/ISPAN.2004.1300483","DOIUrl":"https://doi.org/10.1109/ISPAN.2004.1300483","url":null,"abstract":"In this paper, we present the processor mapping technique to eliminate amount of data exchange in runtime data redistribution on symmetric matrices. The main idea of the proposed technique is to develop mathematical functions for mapping destination processors to a new sequence of processor id. The realigned order of destination processors is then used to perform data redistribution in the receiving phase. Together with a local matrix transposition scheme, interprocessor communication can be totally eliminated in runtime redistribution. The other improvement of this approach is that one does not need to compute the complicated communication sets. The indexing cost is reduced largely. The theoretical analysis shows that (p-1)/p data transmission cost can be saved for a redistribution over p/spl times/p processors grid. Experimental result also shows that the processor mapping technique provides superior improvement for runtime data redistribution.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125024375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A study of concurrency control in Web-based distributed real-time database system using extended time Petri nets 基于web的分布式实时数据库系统中扩展时间Petri网的并发控制研究
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1109/ISPAN.2004.1300459
Yaojun Han, Changjun Jiang, Xuemei Luo
{"title":"A study of concurrency control in Web-based distributed real-time database system using extended time Petri nets","authors":"Yaojun Han, Changjun Jiang, Xuemei Luo","doi":"10.1109/ISPAN.2004.1300459","DOIUrl":"https://doi.org/10.1109/ISPAN.2004.1300459","url":null,"abstract":"The Web-based database system has both distributed and real-time features. In addition to satisfying data consistency requirements as in conventional distributed database systems, concurrency control in Web-based distributed real-time database systems (DRTDBS) must also satisfy timing constraints, such as deadlines associated with transactions. So, the concurrency control problems become more complex and extremely difficult in a Web-based DRTDBS. Petri nets are promising tools for modeling and analysis information processing systems that are characterized as being concurrent, asynchronous, parallel and distributed. An extended time Petri net model for describing and analyzing the concurrent control of the Web-based DRTDBS is presented in this paper. The model has features of deadlock-free and serializability and can prevent useless restarts and useless waits. We compose the reduced Petri net models of all sites into a Petri net model for globe concurrent transactions using synchronizing composition. Moreover, the paper largely reduces the scale of the Petri net model for every site with reduction technique before composing. It solves the state explosion problem in reachability analysis of Petri nets. Last, a sufficient and necessary condition for judging whether the whole system is deadlock is given in the paper.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132179267","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Optimal loop scheduling with register constraints using flow graphs 使用流程图的寄存器约束的最优循环调度
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1109/ISPAN.2004.1300478
Jan Müller, D. Fimmel, R. Merker
{"title":"Optimal loop scheduling with register constraints using flow graphs","authors":"Jan Müller, D. Fimmel, R. Merker","doi":"10.1109/ISPAN.2004.1300478","DOIUrl":"https://doi.org/10.1109/ISPAN.2004.1300478","url":null,"abstract":"We present a novel loop scheduling approach using a generalized flow graph model of the resource constraints. From this model we derive a new flow graph to incorporate register constraints. Our linear programming implementation produces an optimum loop schedule, respecting the constraints on functional units and registers in a single optimization problem. Moreover, the iteration interval is treated as a rational number, and the approach supports heterogeneous processor architectures and pipelined functional units. Compared to earlier approaches, the solution can reduce the problem complexity and solution time, and provide faster loop schedules.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133853850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Exploring core based tree (CBT) in WDM networks WDM网络中基于核心树(CBT)的研究
7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings. Pub Date : 2004-05-10 DOI: 10.1109/ISPAN.2004.1300526
Jianping Wang, X. Qi, Mei Yang, Biao Chen
{"title":"Exploring core based tree (CBT) in WDM networks","authors":"Jianping Wang, X. Qi, Mei Yang, Biao Chen","doi":"10.1109/ISPAN.2004.1300526","DOIUrl":"https://doi.org/10.1109/ISPAN.2004.1300526","url":null,"abstract":"In this paper, we explore the routing and wavelength assignment problem for the CBT service in a WDM network where k sources need to send data to a common core node. We formally model the problem as a problem of finding k shortest lightpaths from sources to the core subject to the constraint of wavelength collision free. We define and study several subproblems, each addressing a different objective. For the feasibility and the minimum total cost problems of k shortest lightpaths, we show how the classical network flow algorithms can be modified and applied efficiently on the network flow model constructed on the transformed wavelength graph. For the minimum max-cost problem, we prove its NP-completeness and propose two efficient heuristic algorithms. Simulation results show that the proposed heuristic algorithms perform very close to the calculated lower bounds.","PeriodicalId":198404,"journal":{"name":"7th International Symposium on Parallel Architectures, Algorithms and Networks, 2004. Proceedings.","volume":"159 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120891292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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