Louis-Philippe Gauthier, W. Lemaire, Keven Gagnon, Charles Quesnel, Jean-Benoit Larouche, J. Rossignol, C. Paulin, Maher Benhouria, K. Koua, S. Roy, R. Fontaine
{"title":"Preliminary Results of a Low-Power Wireless Telemetry Module For Long-Term µECoG Recordings","authors":"Louis-Philippe Gauthier, W. Lemaire, Keven Gagnon, Charles Quesnel, Jean-Benoit Larouche, J. Rossignol, C. Paulin, Maher Benhouria, K. Koua, S. Roy, R. Fontaine","doi":"10.1109/NEWCAS52662.2022.9841994","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9841994","url":null,"abstract":"This study presents the wireless communication module of an implantable multi-site intracranial recording device composed of four arrays of 49 electrodes. The implant is designed for long-term micro-electrocorticography (µECoG) to enable precise epileptic seizures forecasting. The communication module is based on an off-the-shelf Ultra Wide Band achieves (UWB) chipset that up to 96.47 % data transmission at 60 cm. It transmits 4.25 Mbit/s using 29.60 mW of power, resulting in power consumption of 6.96 nJ/bit. These results justify further research and development into a more integrated solution, such as an Application Specific Integrated Circuit (ASIC).","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126819657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 208μW PPG-based Glucose Monitoring SoC using Ensembled Boosted Trees","authors":"Aminah Hina, Sameen Minto, Wala Saadeh","doi":"10.1109/NEWCAS52662.2022.9842163","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842163","url":null,"abstract":"A noninvasive glucose monitoring system-on-chip (SoC) based on near-infrared (NIR) Photoplethysmography (PPG) is proposed in this paper. The proposed SoC includes a PPG-readout circuit, and a glucose estimation processor (GPP). Six different temporal and spectral features are extracted from the PPG signal after motion artifact and baseline removal from the PPG signal. The GPP utilizes Ensembled Boosted Trees to predict blood glucose levels. The SoC is implemented in 180um CMOS and consumes 208μW with an area of 4.5mm2. It achieves a mean absolute relative difference (mARD) of 5.83% (mARD) verified on 200 subjects. This improves (accuracy/power) figure of merit (FoM) by 5.5% compared to the state-of-the-artwork.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128945628","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Comparison of Two RF Rectifiers Designed in FDSOI 22nm for RF Energy Harvesting","authors":"Naveed, J. Dix","doi":"10.1109/NEWCAS52662.2022.9842263","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842263","url":null,"abstract":"In this paper, we compare the performances of two RF Dickson voltage rectifiers realized with two different implementations of diodes in the FDSOI 22 nm process. The comparison is performed to provide a power-efficient rectifier for RF energy harvesting at 915 MHz. The I-V characteristics of a conventional MOS diode and an ultra-low power diode (ULPD) are compared in terms of their leakage current. It is observed in the simulation of a 2-stage RF rectifier that minimizing the leakage current using ULPD improves the power conversion efficiency (PCE) of the RF rectifier. Both rectifiers also utilize back gate polarization (BGP) to boost the output voltages. ULPD achieved a Max PCE of 52 %, whereas conventional MOS diode achieved Max PCE of 47 % at 0dBm input power.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130125915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Amir Sohrab Shabrang, Amir Ahmad Isazadeh, Mohammad Hossein Tazari, Ali Fatemi Mofrad, Fatemeh Akbar
{"title":"A 0.3-V Energy-Efficient Low-Noise CMOS OTA for Portable Bioelectric Signal Acquisition Systems","authors":"Amir Sohrab Shabrang, Amir Ahmad Isazadeh, Mohammad Hossein Tazari, Ali Fatemi Mofrad, Fatemeh Akbar","doi":"10.1109/NEWCAS52662.2022.9842169","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842169","url":null,"abstract":"This paper presents a low-voltage, ultra-low power, and low-noise operational transconductance amplifier (OTA) designed in 180-nm CMOS process. The OTA consists of two amplifying stages and a feed forward compensating path designed to provide a high differential gain while suppressing the common-mode input signal, thereby providing a high common-mode rejection ratio (CMRR). In this OTA, the entire transistors are biased in subthreshold region to allow for an ultra-low power consumption. According to the open loop simulation results, the circuit provides a low-frequency gain of 61 dB, CMRR of 110 dB, power supply rejection ratio (PSRR) of 69.6 dB, and phase margin of 57° for a 1-pF differential load capacitor. Using a capacitive feedback, the closed loop gain is set to 37.8 dB, and the 3-dB bandwidth is 8.33 kHz. The input-referred noise integrated from 250 Hz to 10 kHz is 4.2 μVrms, while the circuit draws only 420 nA from a 0.3 V supply, corresponding to a noise efficiency factor (NEF) of 1.17. The proposed OTA is a suitable candidate for energy-efficient biomedical applications such as neural recording amplifiers, action potential detectors, and portable ECG monitoring systems.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"34 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131869975","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Riya Paul, Asif Faruque, Ayesha Hassan, H. Mantooth, Sama Salehi Vala, A. Mirza, Fang Luo
{"title":"A Heterogeneously Integrated Double-Sided Cooling Silicon Carbide Power Module","authors":"Riya Paul, Asif Faruque, Ayesha Hassan, H. Mantooth, Sama Salehi Vala, A. Mirza, Fang Luo","doi":"10.1109/NEWCAS52662.2022.9842249","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842249","url":null,"abstract":"A novel half-bridge silicon carbide (SiC) double-sided cooling power module with integrated gate drivers, decoupling capacitors (Cdec), temperature sensors, and a current sensor is proposed. 45-degree vertical connection blocks to provide maximum heat dissipation path were proposed. It electrically connects the bottom to the top direct bond copper (DBC) substrate to complete the half-bridge assembly. A low temperature co-fired ceramic (LTCC) based interposer providing mechanical strength between the two substrates and electrical isolation is used. The gate driver die integrated inside the module is a non-isolated single-channel driver with a variable drive strength control feature that can safely operate up to 175ºC. Giant magnetoresistance (GMR) based current measurement solution is implemented, which is contactless and can measure both AC and DC current. A multi-layer LTCC or printed circuit board (PCB) based AC power terminal is proposed to integrate the GMR sensor into the module. The power loop inductance of this highly integrated power module is 1.5 nH. The thermal resistance of this power module package is only 0.06 K/W. This work seeks to overcome the volumetric power density limitations of conventional packaging technologies.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129604855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Bautista, Patricia Gonzalez-Guerrero, D. Lyles, Kylie Huch, George Michelogiannakis
{"title":"Superconducting Digital DIT Butterfly Unit for Fast Fourier Transform Using Race Logic","authors":"M. Bautista, Patricia Gonzalez-Guerrero, D. Lyles, Kylie Huch, George Michelogiannakis","doi":"10.1109/NEWCAS52662.2022.9842221","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842221","url":null,"abstract":"In this paper we present an FFT hardware accelerator based on a butterfly (BUT) structure implemented in Rapid Single-Flux-Quantum (RSFQ) superconducting computing. Our design uses a data representation that combines Race Logic (RL) with pulse streams in order to perform arithmetic operations and generate twiddle factors efficiently. Given today’s stringent area limitations for RSFQ technology, our design aims to maximize area efficiency. Our design shows 2 to 18× higher throughput per area, measured as performance per number of Josephson junctions. Moreover, we demonstrate 20-70% area savings compared to binary RSFQ FFT implementations for 2 to 64 N-points.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"161 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132114307","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Impact of Out-of-Band Blockers on RF LNA Performance","authors":"Corentin Délignac, T. Taris","doi":"10.1109/NEWCAS52662.2022.9842243","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842243","url":null,"abstract":"The inherent low to moderate level of filtering in a receiver makes their developement challenging in terms of linearity. In this article, the impact of the blockers on the RF section performance, combinaison of an antenna filter and an LNA, is investigated. The Gain Drop (GD) and noise factor increase (Finc) are described as a function of the LNA linearity (ICP1, IIPx) and the filter rejection (L1). The measurement results of two LNA notably highlight the large contribution of IM3 on the NF in a multi-blocker scenario.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123616356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Joshi, Sudarshan Yadao, P. Bhange, Pandu Sunil Kumar, K. Mankari, A. Acharyya, S. G. Acharyya
{"title":"FCNet: Deep Learning Architecture for Classification of Fatigue and Corrosion Acoustic Emission Signal","authors":"D. Joshi, Sudarshan Yadao, P. Bhange, Pandu Sunil Kumar, K. Mankari, A. Acharyya, S. G. Acharyya","doi":"10.1109/NEWCAS52662.2022.9842070","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842070","url":null,"abstract":"The recent advancement in semiconductor and computing technology has empowered the field of structural health monitoring in many ways. This work introduces a deep learning-based architecture, ‘FCNet,’ to predict acoustic emission signals arising from deformations like corrosion and fatigue crack. The suggested model uses a lightweight framework that takes advantage of the convolutional neural networks to demonstrate the implicit ability of feature identification, which removes the time-consuming stages of feature selection and extraction. The model’s performance was proved using a dataset of 8566 corrosion and fatigue acoustic emission signals. To identify corrosion and fatigue acoustic emission signals, the model attained a 99.7 percent accuracy, demonstrating the efficacy of the suggested model for real-time reliability. The importance of this research for the industry is that it will provide a lethal approach for identifying metal deformation causes and, as a result, reducing accidents.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116191374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"All-Digital Bi-Directional Gated Ring Oscillator Time Integrator for Mixed-Mode Signal Processing","authors":"Parth Parekh, F. Yuan, Yushi Zhou","doi":"10.1109/NEWCAS52662.2022.9842064","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842064","url":null,"abstract":"This paper proposes an all-digital bi-directional gated ring oscillator (BDGRO) time integrator for mixed-mode signal processing. The proposed time integrator features full compatibility with technology, rapid integration, low power consumption, a virtually unlimited dynamic range, a small silicon area, built-in dynamic element matching, and self-digitization. A new low power high-speed bi-directional gated delay line (BDGDL) up / down counter is also proposed as part of the time integrator. The time integrator is designed in a TSMC 130 nm 1.2 V CMOS technology and analyzed using Spectre with BSIM3.3 device models. Operated at 20 MS/s, the time integrator consumes only 0.25 mW with a gain of 16.48 dB.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114701048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}