Workshop on Parallel and Distributed Simulation最新文献

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Stability of event synchronisation in distributed discrete event simulation 分布式离散事件仿真中事件同步的稳定性
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182496
Anurag Kumar, R. Shorey
{"title":"Stability of event synchronisation in distributed discrete event simulation","authors":"Anurag Kumar, R. Shorey","doi":"10.1145/182478.182496","DOIUrl":"https://doi.org/10.1145/182478.182496","url":null,"abstract":"This paper is concerned with the behaviour of message queues in distributed discrete event simulators. We view a logical process in a distributed simulation as comprising a message sequencer with associated message queues, followed by an event processor. We show that, with standard stochastic assumptions for message arrival and time-stamp processes, the message queues are unstable for conservative sequencing, and for conservative sequencing with maximum lookahead and hence for optimistic resequencing, and for any resequencing algorithm that does not employ interprocessor “flow control”. These results point towards certain fundamental limits on the performance of distributed simulation of open queueing networks.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121300917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
PORTS: a parallel, optimistic, real-time simulator PORTS:一个并行、乐观、实时的模拟器
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182487
Kaushik Ghosh, R. Fujimoto, K. Schwan
{"title":"PORTS: a parallel, optimistic, real-time simulator","authors":"Kaushik Ghosh, R. Fujimoto, K. Schwan","doi":"10.1145/182478.182487","DOIUrl":"https://doi.org/10.1145/182478.182487","url":null,"abstract":"This paper describes issues concerning the design of an optimistic parallel discrete event simulation system that executes in environments that impose real-time constraints on the simulator's execution. Two key problems must be addressed by such a system. First the timing characteristics of the parallel simulator must be sufficiently predictable to allow one to guarantee that real-time deadlines for completing simulation computations will be met. Second, the optimistic computation must be able to interact with its surrounding environment with as little latency as possible, necessitating rapid commitment of I/O operations.\u0000To address the first question, we show that optimistic simulators that never send incorrect messages (sometimes called “aggressive-no-risk” simulators) provide sufficient predictability to allow traditional schedulability analysis techniques commonly used in real-time systems to be applied. We show that incremental state saving techniques introduce sufficient unpredictability that they are not well-suited for real-time environments. We observe that the traditional “lowest timestamp first” scheduling policy used in many optimistic parallel simulation systems is an optimal (in the real-time sense) scheduling algorithm when event timestamps and real-time deadlines are the same. Finally, to address the question for rapid commitment of I/O operations, we utilize a continuous GVT computation scheme for shared-memory multiprocessors where a new value of GVT is computed after processing each event in the simulation.\u0000These ideas are incorporated in a parallel, optimistic, real-time simulation system called PORTS. Initial performance measurements of the shared-memory based PORTS system executing on a Kendall Square Research multiprocessor are presented. Initial performance results are encouraging, demonstrating that PORTS achieves performance approaching that of a conventional Time Warp system for the benchmark programs that were tested.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"188 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133506024","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 32
pGVT: an algorithm for accurate GVT estimation pGVT:一种精确估计GVT的算法
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182553
Loy M. D'Souza, Xianzhi Fan, P. Wilsey
{"title":"pGVT: an algorithm for accurate GVT estimation","authors":"Loy M. D'Souza, Xianzhi Fan, P. Wilsey","doi":"10.1145/182478.182553","DOIUrl":"https://doi.org/10.1145/182478.182553","url":null,"abstract":"The time warp mechanism uses memory space to save event and state information for rollback processing. As the simulation advances in time, old state and event information can be discarded and the memory space reclaimed. This reclamation process is called fossil collection and is guided by a global time value called Global Virtual Time (GVT). That is, GVT represents the greatest minimum time of the fully committed events (the time before which no rollback will occur). GVT is then used to establish a boundary for fossil collection. This paper presents a new algorithm for GVT estimation called pGVT. pGVT was designed to support accurate estimates of the actual GVT value and it operates in an environment where the communication subsystem does not support FIFO message delivery and where message delivery failure may occur. We show that pGVT correctly estimates GVT values and present some performance comparisons with other GVT algorithms.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129647106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 58
Evaluating the use of pre-simulation in VLSI circuit partitioning 评估预仿真在VLSI电路划分中的应用
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182581
R. Chamberlain, Cheryl D. Henderson
{"title":"Evaluating the use of pre-simulation in VLSI circuit partitioning","authors":"R. Chamberlain, Cheryl D. Henderson","doi":"10.1145/182478.182581","DOIUrl":"https://doi.org/10.1145/182478.182581","url":null,"abstract":"One of the significant difficulties in partitioning logic circuits for distributed simulation is the lack of a priori knowledge concerning the evaluation frequency of individual circuit elements. A number of researchers have resorted to pre-simulation to estimate these evaluation frequencies. In this paper we empirically investigate the wisdom of relying on pre-simulation results, and evaluate the degree to which early evaluation frequencies predict later evaluation frequencies. The results show that, for simulations that use random input vectors, pre-simulation has clear merit in predicting circuit element evaluation frequency. This supports the use of pre-simulation as an input to circuit partitioning algorithms.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129636106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Reconfigurable technology: an innovative solution for parallel discrete event simulation support 可重构技术:支持并行离散事件仿真的创新解决方案
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182585
C. Beaumont, P. Boronat, J. Champeau, J. Filloque, B. Pottier
{"title":"Reconfigurable technology: an innovative solution for parallel discrete event simulation support","authors":"C. Beaumont, P. Boronat, J. Champeau, J. Filloque, B. Pottier","doi":"10.1145/182478.182585","DOIUrl":"https://doi.org/10.1145/182478.182585","url":null,"abstract":"Accelerating discrete event simulation can be achieved by using parallel architectures. The use of dedicated hardware is a possible alternative in some special domains like logic simulation. However, few studies have focused on general cases.\u0000This paper presents an innovative solution using a recent hardware technology called FPGA (Field Programmable Gate Array), that enables dynamic synthesis of application specific hardware. Each node of an MIMD parallel machine is tightly coupled to an FPGA ring. This ring allows us to synthesize application specific global operatorsand control or communication circuits and complements the possibilities of the original machine on a wide application spectrum. We present the first results obtained in the simulation field with an eight node prototype.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116018367","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A unified framework for conservative and optimistic distributed simulation 保守和乐观分布式仿真的统一框架
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182480
V. Jha, R. Bagrodia
{"title":"A unified framework for conservative and optimistic distributed simulation","authors":"V. Jha, R. Bagrodia","doi":"10.1145/182478.182480","DOIUrl":"https://doi.org/10.1145/182478.182480","url":null,"abstract":"A great deal of research in the area of distributed discrete event simulation has focussed on evaluating the performance of variants of conservative and optimistic methods on different types of applications. Application characteristics like lookahead, communication patterns, etc. have been found to affect the suitability of a specific protocol to simulate a given model. For many systems, it may be the case that different subsystems possess contradictory characteristics such that whereas some subsystems may be simulated efficiently using a conservative protocol, others may be more amenable to optimistic methods. Furthermore, the suitability of a protocol for a given subsystem may change dynamically. We propose a parallel simulation protocol that allows different parts of a system to be simulated using different protocols, allowing these protocols to be switched dynamically. A proof of correctness is presented, along with some preliminary performance discussion.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134043423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 71
Cost/performance of a parallel computer simulator 并行计算机模拟器的成本/性能
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182587
B. Falsafi, D. Wood
{"title":"Cost/performance of a parallel computer simulator","authors":"B. Falsafi, D. Wood","doi":"10.1145/182478.182587","DOIUrl":"https://doi.org/10.1145/182478.182587","url":null,"abstract":"This paper examines the cost/performance of simulating a hypothetical target parallel computer using a commercial host parallel computer. We address the question of whether parallel simulation is simply faster than sequential simulation, or if it is also more cost-effective. To answer this, we develop a performance model of the Wisconsin Wind Tunnel (WWT), a system that simulates cache-coherent shared-memory machines on a message-passing Thinking Machines CM-5. The performance model uses Kruskal and Weiss's fork-join model to account for the effect of event processing time variability on WWT's conservative fixed-window simulation algorithm. A generalization of Thiebaut and Stone's footprint model accurately predicts the effect of cache interference on the CM-5. The model is calibrated using parameters extracted from a fully-parallel simulation (p=N), and validated by measuring the speedup as the number of processors (p) ranges from one to the number of target nodes (N. Together with simple cost models, the performance model indicates that for target system sizes of 32 nodes and larger, parallel simulation is more cost-effective than sequential simulation. The key intuition behind this result is that large simulations require large memories, which dominate the cost of a uniprocessor; parallel computers allow multiple processors to simultaneously access this large memory.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114747813","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A generalized carrier-null method for conservative parallel simulation 保守并行仿真的广义载波零方法
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182492
Kenneth R. Wood, S. Turner
{"title":"A generalized carrier-null method for conservative parallel simulation","authors":"Kenneth R. Wood, S. Turner","doi":"10.1145/182478.182492","DOIUrl":"https://doi.org/10.1145/182478.182492","url":null,"abstract":"The carrier-null message approach to conservative-distributed discrete-event simulation can significantly reduce the number of synchronization messages required to avoid deadlock. In this paper we show that the original approach does not apply to simulations with arbitrary communication graphs and we propose a modified carrier-null approach which does. We present and discuss some preliminary results obtained using our approach to simulate digital logic circuits.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130897341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
Investigations in adaptive distributed simulation 自适应分布式仿真研究
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182481
Donald O. Hamnes, A. Tripathi
{"title":"Investigations in adaptive distributed simulation","authors":"Donald O. Hamnes, A. Tripathi","doi":"10.1145/182478.182481","DOIUrl":"https://doi.org/10.1145/182478.182481","url":null,"abstract":"A new adaptive protocol for distributed discrete event simulation is proposed. This protocol spans the continuum of protocols from conservative to optimistic allowing each process in a distributed simulation to adapt to the specific simulation problem at runtime. An actual implementation of the protocol has been tested on a network of workstations for a closed queueing system. The results are very favorable and the algorithm has outperformed a conservative and an optimistic protocol in some cases.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131138261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 41
Domain decomposition methods for circuit simulation 电路仿真的域分解方法
Workshop on Parallel and Distributed Simulation Pub Date : 1994-08-01 DOI: 10.1145/182478.182588
U. Kleis, O. Wallat, U. Wever, Q. Zheng
{"title":"Domain decomposition methods for circuit simulation","authors":"U. Kleis, O. Wallat, U. Wever, Q. Zheng","doi":"10.1145/182478.182588","DOIUrl":"https://doi.org/10.1145/182478.182588","url":null,"abstract":"In this paper we discuss the application of domain decomposition methods to circuit simulation. This coarse grain parallelization guarantees a minimum of communication and thus achieves good speedup results on a workstation cluster. Our results show that with a cluster of ten powerful RISC workstations comparable turn around times to a supercomputer can be achieved. Furthermore a workstation cluster offers the possibility to simulate electric circuits with a size of new magnitude. On a cluster of 27 workstations we succeeded in simulating a circuit with 135000 transistors, while we failed to simulate the same circuit on our supercomputer because of a lack of memory.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134068095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
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