Reconfigurable technology: an innovative solution for parallel discrete event simulation support

Abstract

Accelerating discrete event simulation can be achieved by using parallel architectures. The use of dedicated hardware is a possible alternative in some special domains like logic simulation. However, few studies have focused on general cases. This paper presents an innovative solution using a recent hardware technology called FPGA (Field Programmable Gate Array), that enables dynamic synthesis of application specific hardware. Each node of an MIMD parallel machine is tightly coupled to an FPGA ring. This ring allows us to synthesize application specific global operatorsand control or communication circuits and complements the possibilities of the original machine on a wide application spectrum. We present the first results obtained in the simulation field with an eight node prototype.