Domain decomposition methods for circuit simulation

Abstract

In this paper we discuss the application of domain decomposition methods to circuit simulation. This coarse grain parallelization guarantees a minimum of communication and thus achieves good speedup results on a workstation cluster. Our results show that with a cluster of ten powerful RISC workstations comparable turn around times to a supercomputer can be achieved. Furthermore a workstation cluster offers the possibility to simulate electric circuits with a size of new magnitude. On a cluster of 27 workstations we succeeded in simulating a circuit with 135000 transistors, while we failed to simulate the same circuit on our supercomputer because of a lack of memory.