2014 9th IEEE International Conference on Networking, Architecture, and Storage最新文献

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SDVC: A Scalable Deduplication Cluster for Virtual Machine Images in Cloud SDVC:用于云中的虚拟机映像的可扩展重复数据删除集群
Chuan Lin, Q. Cao, Hongliang Zhang, Guo-Hao Huang, C. Xie
{"title":"SDVC: A Scalable Deduplication Cluster for Virtual Machine Images in Cloud","authors":"Chuan Lin, Q. Cao, Hongliang Zhang, Guo-Hao Huang, C. Xie","doi":"10.1109/NAS.2014.20","DOIUrl":"https://doi.org/10.1109/NAS.2014.20","url":null,"abstract":"Nowadays, while the storage requirement of virtual machine images generated in cloud infrastructures can be potentially reduced by the deduplication, considering their scale and intensity, the deduplication cluster is demanded. Therefore, in this paper we present SDVC, a scalable deduplication cluster for virtual machine images in cloud. SDVC offers both vertical and horizontal scalability. The horizontal scalability is supported by a three-party distributed infrastructure and a hash allocation algorithm. Meanwhile, categorized chunk tracer and buffer capture hot data. Furthermore, SDVC is vertical scalable by setting a suitable hot chunk buffer in virtual machine servers according to their resource usage, reducing chunk searching operations and relieving the workloads on dedup servers. Our experimental results based on a small scale cluster show that the deduplication throughput achieves up to 80% increase with the number of Dedup servers. Furthermore, only hundreds of Kbytes of categoried hot chunk buffer can provide almost 100% performance improvement.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115582928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
sJournal: A New Design of Journaling for File Systems to Provide Crash Consistency sJournal:一种为文件系统提供崩溃一致性的日志记录新设计
Jing Chen, Zhi-hu Tan, Fei Wu, C. Xie
{"title":"sJournal: A New Design of Journaling for File Systems to Provide Crash Consistency","authors":"Jing Chen, Zhi-hu Tan, Fei Wu, C. Xie","doi":"10.1109/NAS.2014.15","DOIUrl":"https://doi.org/10.1109/NAS.2014.15","url":null,"abstract":"Maintain consistency is one of the major challenges faced by modern file systems in the presence of system crashes. File systems have evolved various techniques to provide crash consistency, in which journaling technique is one of the most important. Unfortunately, journaling introduces a write-twice problem: the write traffic is firstly written to the journal space, and latter is written back to the file system space. This problem is critical when version consistency is required in data management applications. To address this problem, we present sJournal, a smart journaling layer which can provide version consistency to the upper file systems efficiently. The key idea of sJournal is to understand the block I/O traffic issued from upper file systems, and redirect the I/O traffic between the journal space and the file system space intelligently. This includes four techniques: 1) detect the upper file system and extract the disk block allocation status, 2) identify and log all the overwrite traffic to the journal space while issuing non-overwrite traffic to the file system space directly, 3) redirect read traffic to the journal space if the target block is logged, 4) checkpoint all the logged data to the file system space at proper timing. We implemented a prototype of sJournal, and incorporated it with Ext3. Through experiments, we compared the performance of Ext3 running with ordered mode, data journal mode and sJournal, respectively. The results show that Ext3 with sJournal support can provide comparable performance to ordered journal mode, while ensuring the version consistency guaranteed in data journal mode.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122426494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Optimal Task Scheduling in MapReduce MapReduce中的最优任务调度
Changjian Wang, Yuxing Peng, Junyi Liu, Mingxing Tang, Guangming Liu, Jinghua Feng, Pengfei You
{"title":"Optimal Task Scheduling in MapReduce","authors":"Changjian Wang, Yuxing Peng, Junyi Liu, Mingxing Tang, Guangming Liu, Jinghua Feng, Pengfei You","doi":"10.1109/NAS.2014.26","DOIUrl":"https://doi.org/10.1109/NAS.2014.26","url":null,"abstract":"The scheduling approach in MapReduce may result in the \"long tail\" problem because of the unreasonable task assignment and high scheduling overhead because of an amount of task scheduling operations. To address these problems, a new task scheduling approach for MapReduce, named \"Iterative Task Scheduling Algorithm\", is proposed. The new approach tries to schedule the map tasks according to the solution of the equation for the optimal task assignment. Thus the \"long tail\" problem can be mitigated effectively and the task scheduling operations can be significantly reduced. To support our new scheduling approach, two approaches are proposed: The first one is adopted to estimate task execution times of nodes and the second one is adopted to produce the optimal task assignment based on the known task execution times of nodes. Comprehensive experiments have been performed with the real log data from the Ali Cloud and the results verify the effectiveness of the new task scheduling approach. The map runtime of the job is reduced 23% in our experiments.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123464868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Optimizing Memory Access with Fast Address Computation on a MIPS Architecture 基于MIPS架构的快速地址计算优化内存访问
Qi Ao, Guojie Jin, Wen Su, Songsong Cai, Shuai Chen
{"title":"Optimizing Memory Access with Fast Address Computation on a MIPS Architecture","authors":"Qi Ao, Guojie Jin, Wen Su, Songsong Cai, Shuai Chen","doi":"10.1109/NAS.2014.31","DOIUrl":"https://doi.org/10.1109/NAS.2014.31","url":null,"abstract":"A 64-bit RISC processor is designed for large applications that need large memory address. Due to the restriction of the instruction fixed length, loading a 64-bit address needs a number of instructions, leading to a penalty both of memory performance and memory consumption. This paper describes an address computation method based on hardware and software co-design. In our extended MIPS processor which supports register + register addressing, we achieve an approximate effect of memory access as their 32-bit counterparts, we propose a software load-address method, which simplifies the calculation of 64-bit address. We implement our methods in the 64-bit OpenJDK 6 on MIPS, and give both performance and consumption comparisons for SPECjvm2008 and Dacapo. The experimental results show that the performance of SPECjvm2008 is improved by 5.1%, the performance of Dacapo is improved by 7.3% and near to 24% for some benchmarks. The size of method generated by JVM compiler is reduced by an average of 13%.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122184702","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Mathematical Model of a Three-Dimensional Optical Interconnection Network 三维光互连网络的数学模型
Chao Peng, Jia Lu, Lewen Zhou, Chen Qin, Longfei Guo, Wenhua Dou
{"title":"Mathematical Model of a Three-Dimensional Optical Interconnection Network","authors":"Chao Peng, Jia Lu, Lewen Zhou, Chen Qin, Longfei Guo, Wenhua Dou","doi":"10.1109/NAS.2014.12","DOIUrl":"https://doi.org/10.1109/NAS.2014.12","url":null,"abstract":"With the improving performance of microprocessors, their bandwidth and latency requirements have increased at a rate much faster than the network's ability to provide them. The performance bottleneck has gradually shifted from the processors to the interconnection network. Traditional electrical interconnection, because of its low bandwidth, high delay and low interconnection density, becomes one of the constraints of high-performance computer(HPC)'s further improvement. Due to the inherent limitations of the electrical interconnection network, optical interconnection has become a feasible way to improve the performance. A Three-Dimensional Optical Interconnection Network (TDOIN) with low latency and high throughput was put forward in our previous work. An accurate mathematical model can help us design and optimize the optical networks. However, there is not a mathematical model which can provide an accurate analysis for TDOIN. To make better use of the network, we propose a steady-state model to evaluate TDOIN's network characteristics in this paper. This mathematical model is constructed by using Probability Theory. The results of the model analysis and the simulation shows that our model can accurately depict behaviors of TDOIN at steady state.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126143402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Longest Prefix Lookup in Named Data Networking: How Fast Can It Be? 命名数据网络中最长前缀查找:它能有多快?
Fu Li, Fuyu Chen, Jianming Wu, Haiyong Xie
{"title":"Longest Prefix Lookup in Named Data Networking: How Fast Can It Be?","authors":"Fu Li, Fuyu Chen, Jianming Wu, Haiyong Xie","doi":"10.1109/NAS.2014.36","DOIUrl":"https://doi.org/10.1109/NAS.2014.36","url":null,"abstract":"Named data networking architectures have emerged and attracted significant attention in recent years. Due to the name space being many orders of magnitude larger and more complex than IP address space, such architectures pose many significant challenges on design of routers and routing algorithms. IP forwarding algorithms are no longer applicable and cannot reach the satisfactory performance. In this paper, we ask ourselves the following question: how fast can the longest prefix name based lookup be? This is a key question to answer in order for named data networking architectures to be potentially successful. As an attempt to answer this question, we present a framework of fast longest prefix name lookup, based on a name space reduction scheme we proposed for named data networking. We also investigate feasible implementations on both CPU and GPU platforms. We demonstrate that we can achieve name lookup throughput as high as more than 37 and 70 million packets per second, respectively, on off-theshelf general-purpose CPU and GPU platforms. These results suggest that achieving high-performance lookup in named data networking architectures is not only feasible but also practical.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127027710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
MMD: An Approach to Improve Reading Performance in Deduplication Systems MMD:一种提高重复数据删除系统读取性能的方法
Chao Li, Shupeng Wang, Xiao-chun Yun, Xiaoyang Zhou, Guangjun Wu
{"title":"MMD: An Approach to Improve Reading Performance in Deduplication Systems","authors":"Chao Li, Shupeng Wang, Xiao-chun Yun, Xiaoyang Zhou, Guangjun Wu","doi":"10.1109/NAS.2014.21","DOIUrl":"https://doi.org/10.1109/NAS.2014.21","url":null,"abstract":"The approach of data deduplication has been widely used in backup systems and primary storage such as virtual machine platform. However, the reading speed in those systems suffers due to chunk fragmentation in deduplication. So it has become an important problem to improve reading performance in deduplication systems. In this paper, firstly we propose a new storage method using multiple disks to boost reading performance, which is called MMD. MMD takes advantage of the multiple parallelized disks, each of which is used as independent logical device. Then we present a deduplication model based on MMD, which focuses on optimization of data layout on disks to improve reading speed. Two I/O scheduling algorithms in that model are discussed, which aim at assigning the containers in deduplication systems to appropriate disks. Experiments show that MMD can achieve an obvious reading performance improvement than RAID in deduplication systems.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126408119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
RPSim: A Rapid Prototyping Full-System Simulator for SoC Software Development RPSim: SoC软件开发的快速原型全系统模拟器
Haojun Wang, Qinghao Min, Yi Li, Weihua Zhang
{"title":"RPSim: A Rapid Prototyping Full-System Simulator for SoC Software Development","authors":"Haojun Wang, Qinghao Min, Yi Li, Weihua Zhang","doi":"10.1109/NAS.2014.45","DOIUrl":"https://doi.org/10.1109/NAS.2014.45","url":null,"abstract":"Nowadays, the release of SoC products has come to a burst. Time-to-market of these products has been shortened to an extreme, nearly 8 to 12 months. To reduce production period, hardware architects generally combine well-tuned IP cores in their designs. To guarantee the process of SoC software development, which will finally decide the release time of products, a fast prototyping simulation platform for SoC software development should be available as soon as possible after hardware design. However, state-of-the-art SoC simulators lack the support for fast integration of IP core and require time-consuming compiler chain modifications for new instructions. In this paper, we present Prism, an extensible and easy-to-use full-system SoC simulation platform for SoC software development. Two mechanisms are designed and implemented to support fast prototyping for new IP core simulation or new instruction extension without compiler tool chain modifications. First, a hardware and software hybrid mechanism is proposed for IP core fast prototyping. A seamless interface is used to eliminate the differences among IP cores. Second, a configurable library mechanism is designed for new instruction extension. Register dependence can be maintained for detailed timing simulation without compiler tool chain modification. In such a design, the major effort for extension is to specify the elaborate common customization interface. Experimental results show these mechanisms only involve about 0.36% runtime overhead. Based on RPSim, a graduate student only needs write about 40 lines of code and takes less than half an hour to extend a new IP core simulation in RPSim.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116745065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Provide IPv4 Service Using Pure IPv6 Servers with Stateless NAT64 Translator 使用无状态NAT64转换器的纯IPv6服务器提供IPv4服务
Rong Jin, CongXiao Bao, Xing Li
{"title":"Provide IPv4 Service Using Pure IPv6 Servers with Stateless NAT64 Translator","authors":"Rong Jin, CongXiao Bao, Xing Li","doi":"10.1109/NAS.2014.11","DOIUrl":"https://doi.org/10.1109/NAS.2014.11","url":null,"abstract":"The current Internet is suffering from IPv4 address depletion. Stateless NAT64 is proposed to facilitate the IPv4/IPv6 co-existence and transition. In the past, the stateless NAT64 is mainly for IPv6 clients to access both IPv6 and IPv4 servers. As the fast growth of IP address consuming Internet services, the support for pure IPv6 servers is becoming urgent. In this paper, we propose a design of stateless NAT64 based translator with server port mapping and application layer proxy support to ensure both the IPv4 and IPv6 accessibility to pure IPv6 servers. By deploying such translators, pure IPv6 server infrastructure can be built and the transition process can be promoted.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131501951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Moving Target Framework to Improve Network Service Accessibility 改进网络服务可访问性的移动目标框架
Jinqiao Shi, Xiao Wang, Binxing Fang, Li Guo
{"title":"A Moving Target Framework to Improve Network Service Accessibility","authors":"Jinqiao Shi, Xiao Wang, Binxing Fang, Li Guo","doi":"10.1109/NAS.2014.48","DOIUrl":"https://doi.org/10.1109/NAS.2014.48","url":null,"abstract":"Nowadays, the problem of Internet services accessibility has become a hot topic with more and more cyber attacks and censorship. This has prompted the rapid development of jamming-resistance infrastructure consisting of multiple dynamic access points such as proxies, anonymous communication nodes and covert communication nodes. However, the channel between user and access point has become an emerging attacking target for the adversary. Once the channel is detected and identified by the adversary, the channel will be interrupted. Though users can require new access points from the infrastructure and resume the communication to their destination, the service quality will be downgraded dramatically due to the time-consuming bootstrapping process. In this paper, a moving target framework is proposed to improve the network service accessibility, which combines both time-consuming bootstrapping and frequent and low-cost channel refreshing operations. The constant channel refreshing operations is imported to limit the adversary's ability of detecting and blocking communications, thus to make the lifespan of effective communication longer. With theoretical and simulating analysis, the optimized refreshing strategy is proposed, which can help improve service accessibility.","PeriodicalId":186621,"journal":{"name":"2014 9th IEEE International Conference on Networking, Architecture, and Storage","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125064238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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