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The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.最新文献

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Parameter embedding method of variable-coefficient invertible deinterlacing into Motion-JPEG2000 through ROI 基于ROI的变系数可逆去隔行参数嵌入Motion-JPEG2000的方法
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1354184
J. Uchita, S. Muramatsu, T. Ishida, H. Kikuchi, T. Kuge
{"title":"Parameter embedding method of variable-coefficient invertible deinterlacing into Motion-JPEG2000 through ROI","authors":"J. Uchita, S. Muramatsu, T. Ishida, H. Kikuchi, T. Kuge","doi":"10.1109/MWSCAS.2004.1354184","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1354184","url":null,"abstract":"In this work, a coefficient-parameter embedding method is proposed for invertible deinterlacing with variable coefficients in the application to Motion-JPEG2000 (MJP2). Invertible deinterlacing, which the authors have developed before, can be used as a preprocess of frame-based motion picture codec, such as MJP2, for interlaced videos. When the conventional field-interleaving is used instead, comb-tooth artifacts appear around edges of moving objects. On the other hand, the invertible deinterlacing technique allows us to suppress the comb-tooth artifacts and also to recover an original picture on demand. As previous works, the authors have developed a variable coefficient scheme with a motion detector, which realizes adaptability to local characteristics of given pictures. When applying this deinterlacing technique to video codec, however, it is required to send coefficient parameters to receivers for original picture recovery. This work proposes a parameter-embedding technique for MJP2 and constructs a standard stream which consists both of picture data and the parameters. We investigate to embed the parameters into the LH/sub 1/ component of the wavelet domain through the ROI (region of interest) function of JPEG2000 without significant loss in the performance of comb-tooth suppression.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115302914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An efficient line based VLSI architecture for 2D lifting DWT 基于线的二维提升DWT高效VLSI架构
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1354140
Gab Jung, Duk Young Jin, S. Park
{"title":"An efficient line based VLSI architecture for 2D lifting DWT","authors":"Gab Jung, Duk Young Jin, S. Park","doi":"10.1109/MWSCAS.2004.1354140","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1354140","url":null,"abstract":"This paper presents a line based VLSI architecture for real time processing of 2D lifting discrete wavelet transform (DWT). The architecture computes lifting operation based on state space representation and uses RPA (Recursive Pyramid Algorithm) scheme. To improve hardware utilization, the filter that is responsible for column operations of the first level performs both the row and column operations of the second and following levels. As a result, the architecture has the 66.7%-88.9% hardware utilization and requires only 9 multipliers and 12 adders for biorthogonal (9,7)/(5,3) filter, which is a smaller hardware complexity compared to that of other architecture with comparable throughput.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115779296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
Instantaneous frequency based nonlinear adaptive filter for interference suppression in spread spectrum systems 扩频系统中基于瞬时频率的非线性自适应干扰抑制滤波器
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1354382
K. Deergha Rao, M. Swamy, E. Plotkin
{"title":"Instantaneous frequency based nonlinear adaptive filter for interference suppression in spread spectrum systems","authors":"K. Deergha Rao, M. Swamy, E. Plotkin","doi":"10.1109/MWSCAS.2004.1354382","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1354382","url":null,"abstract":"This paper presents an approach based on jammer instantaneous frequency estimation for suppression of frequency modulated (FM) jammers in spread spectrum systems. The FM jammers are instantaneous narrowband and have clear time-frequency signatures that are distinct from spread spectrum code. In the proposed approach, an augmented state-space representation of the received signal (spread spectrum signal+noise+interference signal) is developed using a three-coefficient FIR model for the FM interference. Based on the state-space representation developed, a Kalman-type nonlinear adaptive filter namely, augmented state approximate conditional mean filter (ASACMF) is formulated to estimate the unknown jammer instantaneous frequency and the FM interference from the received signal. The efficacy of the proposed filter is corroborated with simulation examples for FM interference suppression in spread spectrum systems. The performance improvement achieved with the proposed filter is quantified in comparison with the three coefficient FIR excision filter. Simulation results show that the proposed filter is effective in suppressing the FM interference in spread spectrum systems with good receiver output SNRs.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"83 S2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113960857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
An architecture for feature detection utilizing dynamic synapses 一种利用动态突触进行特征检测的架构
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1354171
A. Heittmann, U. Ramacher
{"title":"An architecture for feature detection utilizing dynamic synapses","authors":"A. Heittmann, U. Ramacher","doi":"10.1109/MWSCAS.2004.1354171","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1354171","url":null,"abstract":"An architecture for feature detection based on artificial pulsed neural networks is presented. By utilizing substancial principles like correlation of pulses using dynamic synapses as well as distribution of connections defined by connection densities, arbitrary detectors up to a complexity of simple cells can be implemented.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121672051","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Design of IIR digital filters with finite-wordlength coefficients based on a MLS criteria 基于MLS准则的有限字长系数IIR数字滤波器设计
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1354091
M. Nakamoto, T. Hinamoto
{"title":"Design of IIR digital filters with finite-wordlength coefficients based on a MLS criteria","authors":"M. Nakamoto, T. Hinamoto","doi":"10.1109/MWSCAS.2004.1354091","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1354091","url":null,"abstract":"In this paper, we treat a design method for IIR digital filters with finite-wordlength described by rational transfer functions. First, we form the filter design problem in the quadratic form with respect to the numerator and denominator coefficients using the modified least-squares (MLS) criterion. Next, we show the lower bound estimation principle using the Lagrange multiplier method in order to search for the optimum solution of the filters efficiently. Additionally we can check the filter stability when designing the denominator coefficients. Finally, we show the effectiveness of the proposed method using a numerical example.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"208 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121685770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Electric drive emulator using dSPACE real time platform for VHDL verification 电驱动仿真器采用dSPACE实时平台进行VHDL验证
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1354348
O. Laakkonen, K. Rauma, H. Sarén, J. Luukko, O. Pyrhonen
{"title":"Electric drive emulator using dSPACE real time platform for VHDL verification","authors":"O. Laakkonen, K. Rauma, H. Sarén, J. Luukko, O. Pyrhonen","doi":"10.1109/MWSCAS.2004.1354348","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1354348","url":null,"abstract":"The use of programmable logic devices e.g. field programmable gate arrays (FPGA) in the motor control devices increase the complexity of the testing and verification. Simulation and verification can be linked together using Simulink, HDL-simulation library and dSPACE real time platform. VHDL co-simulations with Simulink model allows control algorithms to be simulated together with the rest of the system model. dSPACE real time platform allows Simulink models to be executed in real time. dSPACE can be used to emulate inverter and motor in the verification phase where control algorithms run in FPGA circuit and control the whole emulated electric drive system.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123872398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Per-tone equalization for single carrier block transmission with cyclic prefix 带循环前缀的单载波分组传输的每音均衡
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1354242
K. Hayashi, H. Sakai
{"title":"Per-tone equalization for single carrier block transmission with cyclic prefix","authors":"K. Hayashi, H. Sakai","doi":"10.1109/MWSCAS.2004.1354242","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1354242","url":null,"abstract":"This paper proposes per-tone equalization methods for single carrier block transmission with cyclic prefix (SC-CP). Minimum mean-square-error (MMSE) based optimum weights of the per-tone equalizers are derived for SISO (single-input single-output), SIMO (single-input multiple-output), and MIMO (multiple-input multiple-output) SC-CP systems. The proposed equalizers have multiple taps for each tone, therefore, they can achieve good performance even when the length of the guard interval (GI) is shorter than channel order. Moreover, by employing sliding discrete Fourier transform (DFT), the proposed equalizers can be efficiently implemented. Computer simulation results show that the proposed equalizers can significantly improve the bit error rate (BER) performance of the SISO, SIMO, and MIMO SC-CP systems with the insufficient GI.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125132334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Design and implementation of multidimensional multirate systems 多维多速率系统的设计与实现
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1354215
M. Tchobanou
{"title":"Design and implementation of multidimensional multirate systems","authors":"M. Tchobanou","doi":"10.1109/MWSCAS.2004.1354215","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1354215","url":null,"abstract":"The problem of the design and effective implementation of nonseparable 2D, 3D and 4D multirate systems is considered. The questions to be answered: the design and implementation of effective filter banks with prescribed properties, the implementation of nonseparable decimation and interpolation operators, the coder and decoder systems.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125645539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Simulation and implementation of an analog VLSI pulse-coupled neural network for image segmentation 用于图像分割的模拟VLSI脉冲耦合神经网络的仿真与实现
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1354177
D. Matolin, J. Schreiter, R. Schuffny, A. Heittmann, U. Ramacher
{"title":"Simulation and implementation of an analog VLSI pulse-coupled neural network for image segmentation","authors":"D. Matolin, J. Schreiter, R. Schuffny, A. Heittmann, U. Ramacher","doi":"10.1109/MWSCAS.2004.1354177","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1354177","url":null,"abstract":"We present a massively parallel VLSI realization of a pulse-coupled neural network for image segmentation. The network comprises 128 /spl times/ 128 simple nonleaky integrate-and-fire (IAF) neurons with self-organizing inter-neural connections. The prototype implementation also contains analog memories for image storing and a digital readout circuit using an address-event-representation (AER) protocol. The chip has been designed in an Infineon 0.13 /spl mu/m standard CMOS technology.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122725819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Approach to high-linear programmable gain amplifiers 高线性可编程增益放大器的研究
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. Pub Date : 2004-07-25 DOI: 10.1109/MWSCAS.2004.1353921
M. T. Sanz, S. Celma, B. Calvo
{"title":"Approach to high-linear programmable gain amplifiers","authors":"M. T. Sanz, S. Celma, B. Calvo","doi":"10.1109/MWSCAS.2004.1353921","DOIUrl":"https://doi.org/10.1109/MWSCAS.2004.1353921","url":null,"abstract":"Two different approaches to digitally programmable gain amplifiers (PGAs) are presented in this paper and compared in terms of linearity, frequency, area and power consumption. They are characterized by their inherently high linearity and wide gain tuning. In the first proposal, linearity is achieved by using poly resistor arrays whereas the second is based on a MOST-only inherently linear current division principle. The paper presents the principles of operation and design equations of both approaches, in addition to experimental results in a 2.5 V 0.35 /spl mu/m CMOS process which show their trade-offs.","PeriodicalId":185817,"journal":{"name":"The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.","volume":"32 21","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131501885","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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