2019 32nd Symposium on Integrated Circuits and Systems Design (SBCCI)最新文献

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Fine-grain Temperature Monitoring for Many-Core Systems 多核系统的细粒度温度监测
2019 32nd Symposium on Integrated Circuits and Systems Design (SBCCI) Pub Date : 2019-08-26 DOI: 10.1145/3338852.3339841
A. Silva, Andre L. M. Martins, F. Moraes
{"title":"Fine-grain Temperature Monitoring for Many-Core Systems","authors":"A. Silva, Andre L. M. Martins, F. Moraes","doi":"10.1145/3338852.3339841","DOIUrl":"https://doi.org/10.1145/3338852.3339841","url":null,"abstract":"The power density may limit the amount of energy a many-core system can consume. A many-core at its maximum performance may lead to safe temperature violations and, consequently, result in reliability issues. Dynamic Thermal Management (DTM) techniques have been proposed to guarantee that many-core systems run at good performance without compromising reliability. DTM techniques rely on accurate temperature information and estimation, which is a computationally complex problem. However, related works usually abstract the temperature monitoring complexity, assuming available temperature sensors. An issue related to temperature sensors is their granularity, frequently measuring the temperature of a large system area instead of a processing element (PE) area. Therefore, the first goal of this work is to propose a fine-grain (PE level) temperature monitoring for many-core systems. The second one is to present a dedicated hardware accelerator to estimate the system temperature. Results show that software performance can be a limiting factor when applying an accurate model to provide temperature estimation for system management. On the other side, the hardware accelerator connected to the many-core enables the fine-grain temperature estimation at runtime without sacrificing system performance.","PeriodicalId":184401,"journal":{"name":"2019 32nd Symposium on Integrated Circuits and Systems Design (SBCCI)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125121908","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
NMLSim 2.0: A robust CAD and simulation tool for in-plane Nanomagnetic Logic based on the LLG equation NMLSim 2.0:基于LLG方程的平面内纳米磁逻辑的鲁棒CAD和仿真工具
2019 32nd Symposium on Integrated Circuits and Systems Design (SBCCI) Pub Date : 2019-08-26 DOI: 10.1145/3338852.3339856
Lucas A. Lascasas Freitas, O. V. Neto, J. G. N. Rahmeier, L. Melo
{"title":"NMLSim 2.0: A robust CAD and simulation tool for in-plane Nanomagnetic Logic based on the LLG equation","authors":"Lucas A. Lascasas Freitas, O. V. Neto, J. G. N. Rahmeier, L. Melo","doi":"10.1145/3338852.3339856","DOIUrl":"https://doi.org/10.1145/3338852.3339856","url":null,"abstract":"Nanomagnetic Logic (NML) is a new technology based on the magnetization of nanometric magnets. Logic operations are performed via dipolar coupling through ferromagnetic and antiferromagnetic interactions. The low energy dissipation and the possibility of higher integration density in circuits are significant advantages over CMOS technology. Even so, there is a great need for simulation and CAD tools for the proper study of large NML circuits. This paper presents a high-efficiency tool that uses the Landau-Lifshitz-Gilbert equation to evolve the magnetization of the particles over time in a monodomain approach. The new version of NMLSim comes with flexibility in its code, allowing expansion of the tool with ease and consistency. The results of simulated structures show the reliability of the simulator when compared with the current state of the art Object-Oriented Micromagnetic Framework (OOMMF). It also presents an improvement of up to 716 times in execution time and up to 41 times in memory usage.","PeriodicalId":184401,"journal":{"name":"2019 32nd Symposium on Integrated Circuits and Systems Design (SBCCI)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129004885","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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