2010 International Conference on Field Programmable Logic and Applications最新文献_第6页

Customized Exposed Datapath Soft-Core Design Flow with Compiler Support 自定义暴露的数据路径软核设计流与编译器的支持

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1109/FPL.2010.51

Otto Esko, P. Jääskeläinen, P. Huerta, C. S. D. L. Lama, J. Takala, J. Martínez

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引用次数: 92

Advanced Multithreading Architecture with Hardware Based Scheduling 基于硬件调度的高级多线程架构

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1109/FPL.2010.28

Ye Lu, S. Sezer, J. McCanny

引用次数: 7

Test Compression for Dynamically Reconfigurable Processors 动态可重构处理器的测试压缩

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1145/2068716.2068726

Hiroaki Inoue, J. Yamada, H. Yoneda, K. Togawa, M. Motomura, K. Furuta

引用次数: 0

PrEsto: An FPGA-accelerated Power Estimation Methodology for Complex Systems PrEsto:一种fpga加速的复杂系统功率估计方法

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1109/FPL.2010.69

Dam Sunwoo, Gene Y. Wu, N. Patil, Derek Chiou

{"title":"PrEsto: An FPGA-accelerated Power Estimation Methodology for Complex Systems","authors":"Dam Sunwoo, Gene Y. Wu, N. Patil, Derek Chiou","doi":"10.1109/FPL.2010.69","DOIUrl":"https://doi.org/10.1109/FPL.2010.69","url":null,"abstract":"Reduced or bounded power consumption has become a first-order requirement for modern hardware design. As a design progresses and more detailed information becomes available, more accurate power estimations become possible but at the cost of significantly slower simulation speeds. Power simulation that is both sufficiently-accurate and fast would have a positive impact on architecture and design. In this paper, we propose PrEsto, a power modeling methodology that improves the speed and accuracy of power estimation through FPGA-acceleration. PrEsto automatically generates FPGA-based power estimators consisting of linear models that are designed to be integrated into fast, accurate FPGA-based performance simulators of microprocessors. Our prototype implementation predicts the cycle-by-cycle power dissipation of the LEON3 core and the ARM Cortex-A8 core to within 6% of a commercial gate-level power estimation tool, while running several orders of magnitude faster. The combination of simulation speed and accuracy is not only useful to architects and designers, it is fast enough to be useful for power-sensitive operating system and application developers.","PeriodicalId":171235,"journal":{"name":"2010 International Conference on Field Programmable Logic and Applications","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124039239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 36

MalCoBox: Designing a 10 Gb/s Malware Collection Honeypot Using Reconfigurable Technology MalCoBox:利用可重构技术设计10gb /s恶意软件收集蜜罐

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1109/FPL.2010.116

Sascha Mühlbach, Martin Brunner, C. Roblee, A. Koch

引用次数: 21

Investigation of a Masking Countermeasure against Side-Channel Attacks for RISC-based Processor Architectures 基于risc处理器体系结构的侧信道攻击屏蔽对策研究

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1109/FPL.2010.35

L. Barthe, P. Benoit, L. Torres

引用次数: 12

Field Programmable Gate Array Implementation of Parts-Based Object Detection for Real Time Video Applications 现场可编程门阵列实现的基于零件的实时视频目标检测

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1109/FPL.2010.114

Deborah Goshorn, Junguk Cho, R. Kastner, Shahnam Mirzaei

引用次数: 11

Online Routing Fault Detection for Reconfigurable NoC 可重构NoC在线路由故障检测

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1109/FPL.2010.45

C. Killian, C. Tanougast, F. Monteiro, A. Dandache

引用次数: 8

Evaluation of Fault-Mitigation Schemes for Fault-Tolerant Dynamic MPSoC 容错动态MPSoC的故障缓解方案评估

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1109/FPL.2010.38

H. Pham, S. Pillement, D. Demigny

引用次数: 6

An FPGA-based Transverse Multibunch Feedback System for Diamond Light Source 基于fpga的金刚石光源横向多束反馈系统

2010 International Conference on Field Programmable Logic and Applications Pub Date : 2010-08-31 DOI: 10.1109/FPL.2010.11

I. Uzun, M. Heron, A. Morgan, G. Rehm

引用次数: 2