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[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers最新文献

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Watchdog parity channels for digital filter protection 看门狗奇偶通道数字滤波器保护
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5318
B. Zagar, G. Redinbo
{"title":"Watchdog parity channels for digital filter protection","authors":"B. Zagar, G. Redinbo","doi":"10.1109/FTCS.1988.5318","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5318","url":null,"abstract":"A novel method is presented for protecting digital filters from both hard and soft errors emanating in their physical realization by using the error-detecting, systematic, real number, convolutional codes. Normal filter operation is augmented by parallel parity channels, and errors in the filter's operation are detected by comparing the parity values with parity samples recalculated from the filters' output. The parity values are calculated in parallel at reduced rate, and no speed degradation is incurred. The rate reduction results because in an (n, k) convolutional code the parity channels operate decimated by a factor of k. It is shown that modifying the parity channels to cancel filter poles leads to a significant reduction in the complexity without sacrificing the detecting power of the convolutional code. Finite-precision arithmetic in the realization introduces noise in error decision variables even in the case of fault-free operation. A statistical analysis is given establishing a bound on the comparators' thresholds above which an error is decided.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132585896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Modelling the influence of unreliable software in distributed computer systems 对分布式计算机系统中不可靠软件的影响进行建模
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5311
B. Helvik
{"title":"Modelling the influence of unreliable software in distributed computer systems","authors":"B. Helvik","doi":"10.1109/FTCS.1988.5311","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5311","url":null,"abstract":"The author develops a system dependability model accounting for the influence of software faults. When one software system resides on a set of distributed computers or processing units, it is necessary to comprehend the logical linkage between system units. The model is based on the concept that a logical fault in a system will cause an inconsistent (erroneous) internal state in the processing unit where the fault is activated, and that this error can cause a failure of the processing unit, be corrected without causing a failure, or propagate to other cooperating processing units. The model also accounts for the logical hardware faults and the transient faults, which have a similar pattern of manifestations. Analysis of the stationary dependability characteristics of distributed systems is discussed. An approximate procedure which allows evaluation of fairly large systems is outlined. A brief example is presented which demonstrates that even a low error propagation may have large performance consequences.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125947001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Fault simulation in a multilevel environment: the MOZART approach 多层环境中的故障模拟:MOZART方法
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5310
G. Cabodi, S. Gai, M. Mezzalama, P. Montessoro, F. Somenzi
{"title":"Fault simulation in a multilevel environment: the MOZART approach","authors":"G. Cabodi, S. Gai, M. Mezzalama, P. Montessoro, F. Somenzi","doi":"10.1109/FTCS.1988.5310","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5310","url":null,"abstract":"MOZART is a concurrent fault simulator for large circuits described at the RT, functional, gate, and switch levels. Performance is gained by means of techniques aimed at the reduction of unnecessary activity. Two such techniques are levelized two-pass simulation, which minimizes the number of events and evaluations, and list event scheduling, which allows optimized processing of simultaneous (fraternal) events for concurrent machines. Both analytical and experimental evidence is provided for the effectiveness of the solutions adopted in MOZART. A performance metric is introduced for fault simulation that is based on comparison with the serial algorithm and is more accurate than those used up till now. Possible tradeoffs between the speeds of fault-free and fault simulations are discussed.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"198 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132014843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A probabilistic method for fault diagnosis of multiprocessor systems 多处理机系统故障诊断的概率方法
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5332
S. Rangarajan, D. Fussell
{"title":"A probabilistic method for fault diagnosis of multiprocessor systems","authors":"S. Rangarajan, D. Fussell","doi":"10.1109/FTCS.1988.5332","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5332","url":null,"abstract":"The authors present a system-level fault-diagnosis algorithm for identifying faulty and fault-free units in a homogeneous system of computing elements. The algorithm is based on a comparison approach where tasks are performed by the units and their outputs are compared among themselves. Unlike other approaches, the authors' algorithm requires no global syndrome analysis and therefore can be performed in real time as a background task during system operation. The time required to perform the diagnosis is constant regardless of the number of units in the system. Like previous global syndrome-based approaches, the accuracy of the algorithm is remarkably high, since it uses information about individual comparison results which is lost when these results are summarized in a global syndrome.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129223886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 43
An easily testable parallel multiplier 一个易于测试的并行乘法器
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5322
S. Hong
{"title":"An easily testable parallel multiplier","authors":"S. Hong","doi":"10.1109/FTCS.1988.5322","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5322","url":null,"abstract":"The n-by-n parallel multiplier can be usually broken into two blocks, the summand-generator and the summand-counter. The summand-generator generates n/sup 2/ summands and the summand-counter adds them up to produce the final 2n-bit product. The summand-generator is easy to test because all inputs are directly controllable and all faults propagate through summand-counter to primary outputs. However, the summand-counter is difficult to test due to poor controllability. To provide 100% controllability of summands, the summand-generator is modified using one extra input. This new summand-generator can be tested with 19 vectors. With this summand-generator, the summand-counter can be constructed testable using the minimum number of adder cells but no extra device or pin. This summand-counter can be tested with 3n+41 vectors. Thus, a parallel multiplier can be designed testable with 3n+60 vectors using only one extra pin.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126580926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Reliability analysis of non repairable systems using stochastic Petri nets 基于随机Petri网的不可修系统可靠性分析
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5302
Kamel Barkaoui, G. Florin, C. Fraize, Bernard Lemaire, S. Natkin
{"title":"Reliability analysis of non repairable systems using stochastic Petri nets","authors":"Kamel Barkaoui, G. Florin, C. Fraize, Bernard Lemaire, S. Natkin","doi":"10.1109/FTCS.1988.5302","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5302","url":null,"abstract":"The algorithm presented is designed to compute large degradable system reliability. These systems are modeled using nonrepetitive stochastic Petri nets. The reliability parameters are computed during the generation of the reachability graph. A criterion is given that allows the computation to be stopped as soon as a given precision is obtained.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114295595","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
An efficient multi-dimensional grids reconfiguration algorithm on hypercube 一种高效的超立方体多维网格重构算法
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5345
Shyh-Kwei Chen, C. Liang, W. Tsai
{"title":"An efficient multi-dimensional grids reconfiguration algorithm on hypercube","authors":"Shyh-Kwei Chen, C. Liang, W. Tsai","doi":"10.1109/FTCS.1988.5345","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5345","url":null,"abstract":"Reconfiguration algorithms are invoked when a fault is detected in the original loop or multidimensional grid. The reconfiguration algorithms are able to reach an equivalent set of topologies within the same architecture in a distributed manner. The authors propose mapping schemes for certain length of loops so that the resulting systems can recover from any fault within one step. With application of one of the schemes, the reconfiguration strategy for a multidimensional grid system can have better performance.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115398364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
RIDDLE: a foundation for test generation on a high level design description 谜语:在高层次设计描述上生成测试的基础
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5300
Gabriel M. Silberman, I. Spillinger
{"title":"RIDDLE: a foundation for test generation on a high level design description","authors":"Gabriel M. Silberman, I. Spillinger","doi":"10.1109/FTCS.1988.5300","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5300","url":null,"abstract":"A formal approach is presented to the analysis of a VLSI design described at the high level, which produces information conducive to the acceleration of test-generation algorithms. This analysis yields information which can be used to reduce the amount of effort expended during backtracking, by guiding this process towards decisions (assignments) less likely to cause conflicts and minimizing the amount of work between backtracks. RIDDLE, an algorithm that performs this analysis in time that is linear in the number of signals, is introduced. Experimental results for the special case of combinatorial gate-level designs are also given.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128107543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor Intel超立方体多处理器的系统级容错性评估
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5344
P. Banerjee, J. T. Rahmeh, C. Stunkel, S. Nair, K. Roy, J. Abraham
{"title":"An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor","authors":"P. Banerjee, J. T. Rahmeh, C. Stunkel, S. Nair, K. Roy, J. Abraham","doi":"10.1109/FTCS.1988.5344","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5344","url":null,"abstract":"A discussion is presented of a fault-tolerant hypercube multiprocessor architecture which uses a novel algorithm-based fault-detection approach for identifying faulty processors. The scheme involves the detection and location of faulty processors concurrently with the actual execution of parallel applications on the hypercube. The authors have implemented system-level fault-detection mechanisms for various parallel applications on a 16-processor Intel iPSC hypercube multiprocessor. They report on the results of two applications: matrix multiplication and fast Fourier transform. They have performed extensive studies of fault coverage of their system-level fault-detection schemes in the presence of finite-precision arithmetic, which affects the system-level encodings. They propose a reconfiguration strategy for reconfiguring the system around faulty processors by introducing spare links and nodes.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115478010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 44
Advanced automatic test pattern generation and redundancy identification techniques 先进的自动测试模式生成和冗余识别技术
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers Pub Date : 1988-06-27 DOI: 10.1109/FTCS.1988.5293
M. Schulz, E. Auth
{"title":"Advanced automatic test pattern generation and redundancy identification techniques","authors":"M. Schulz, E. Auth","doi":"10.1109/FTCS.1988.5293","DOIUrl":"https://doi.org/10.1109/FTCS.1988.5293","url":null,"abstract":"Based on the sophisticated strategies used in the automatic test pattern generation system SOCRATES, the authors present several concepts aiming at a further improvement and acceleration of the deterministic test pattern generation and redundancy identification process. In particular, they describe an improved implication procedure and an improved unique sensitization procedure. Both procedures significantly advance the deterministic test pattern generation and redundancy identification especially for those faults, for which it is difficult to generate a test pattern or to prove them to be redundant, respectively. As a result of the application of the proposed techniques, SOCRATES is capable of successfully generating a test pattern for all testable faults in a set of combinational benchmark circuits, and of identifying all redundant faults with less than 10 backtrackings.<<ETX>>","PeriodicalId":171148,"journal":{"name":"[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114544992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 166
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