Ching-Wei Wu, Ming-Hung Chang, Chia-Cheng Chen, Robin Lee, H. Liao, Jonathan Chang
{"title":"A configurable 2-in-1 SRAM compiler with constant-negative-level write driver for low Vmin in 16nm Fin-FET CMOS","authors":"Ching-Wei Wu, Ming-Hung Chang, Chia-Cheng Chen, Robin Lee, H. Liao, Jonathan Chang","doi":"10.1109/ASSCC.2014.7008881","DOIUrl":"https://doi.org/10.1109/ASSCC.2014.7008881","url":null,"abstract":"This paper presents a configurable SRAM for low voltage operation supporting both pseudo two-port SRAM (P2P-SRAM) and single-port SRAM (SP-SRAM) functions in one compiler. Unlike conventional pseudo two-port SRAM that always performs read first, this work enables dynamic read-or-write-first selection and write-through function. It can improve SP-SRAM function speed by 90% faster than that of the conventional read-first pseudo two-port SRAM design. An area-free constant-negative-level write driver (CNL-WD), which is suitable for compiler development, is used to improve write Vmin for configuration range from 4 to 256 cells/BL. A testchip is fabricated in a 16nm Fin-FET CMOS technology with a 0.0907μm2 6T-SRAM cell.","PeriodicalId":161031,"journal":{"name":"2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126627569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}