2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)最新文献

Robust hardware-software Co-simulation framework for design and validation of Hybrid Systems 用于混合系统设计和验证的鲁棒软硬件联合仿真框架

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/MEMOCODE57689.2022.9954590

Surinder Sood, Avinash Malik, P. Roop

{"title":"Robust hardware-software Co-simulation framework for design and validation of Hybrid Systems","authors":"Surinder Sood, Avinash Malik, P. Roop","doi":"10.1109/MEMOCODE57689.2022.9954590","DOIUrl":"https://doi.org/10.1109/MEMOCODE57689.2022.9954590","url":null,"abstract":"Model based design of embedded controllers is prevalent across different industries. The final step in model based design is synthesis of hardware (or software) controller and then testing the synthesized controller in closed-loop with the plant model - this is termed as co-simulation. Standard cosimulation approaches use asynchronous communication fabric. However, they are known to suffer from race conditions, jitter, etc, making real-time property validation difficult. Current approaches to co-simulation problems either require complex middle-ware or require synthesis of the controller and plant for synchronous execution. However, these approaches are unsuited for hybrid system control design and validation, as they require the plant model to execute at an arbitrarily small simulation step, while the synthesized controller executes at its own rate if any. The small simulation step slows down the simulation and such a setup does not guarantee level crossing detection. In this paper, we propose a novel Metric Interval Temporal Logic (MITL) based validation and Hardware in Loop (HIL) co-simulation framework, which synchronizes and integrates the controller synthesized in hardware and the plant executing in software. A discrete controller handles a level crossing generated by the plant, which evolves on variable step size. The traces generated from the closed-loop operation of the overall system are used to validate MITL properties. Finally, the controller hardware and the plant model are adjoined via a communication architecture, whose sample time is dependent upon the robustness estimates of the MITL properties, which is necessary to guarantee validation correctness.","PeriodicalId":157326,"journal":{"name":"2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114809682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Deriving Pipeline Models for Timing Analysis from High-Level HDL Processor Designs 从高级HDL处理器设计中导出时序分析的管道模型

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/MEMOCODE57689.2022.9954598

Samira Ait Bensaid, Mihail Asavoae, F. Thabet, M. Jan

引用次数: 0

A novel approach to Real-time contract based reasoning for Hybrid Systems 混合系统实时契约推理的新方法

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/MEMOCODE57689.2022.9954599

Surinder Sood, Avinash Malik, P. Roop

{"title":"A novel approach to Real-time contract based reasoning for Hybrid Systems","authors":"Surinder Sood, Avinash Malik, P. Roop","doi":"10.1109/MEMOCODE57689.2022.9954599","DOIUrl":"https://doi.org/10.1109/MEMOCODE57689.2022.9954599","url":null,"abstract":"Worst Case Execution Time (WCET) analysis of large and complex hybrid systems can be time consuming. Contract based design allows for compositional reasoning of complex systems. Contracts justify the behavior of a system by way of assumptions (which are to be satisfied by the system environment) and guarantees, which are to be met by the system. Contracts also play a major role in compositional reasoning, refinement and re-usability of the system components. In this paper, we present a formal framework to enforce real-time contracts using Hoare triples, for synchronous system design and verification. In that regard, we propose real-time Hoare rules which are based on the WCET of the system and its components. We verify the real-time behavior of the system by applying these rules. These rules not only justify the system behavior and the behavior of its components but their timing as well. We also show that these Hoare rules are sound. Then we show that the synchronous composition of component level Hoare rules based contracts justify a system level contract. This real-time contract composition and reasoning technique which is based on real-time Hoare logic rules is the first ever attempt in synchronous system design and verification.","PeriodicalId":157326,"journal":{"name":"2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126946409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A small, but important, concurrency problem in Verilog's semantics? (Work in progress) 一个小的，但重要的，并发问题在Verilog的语义?(工作进行中)

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/memocode57689.2022.9954591

Andreas Loow

引用次数: 2

Runtime Interchange of Enforcers for Adaptive Attacks: A Security Analysis Framework for Drones 自适应攻击执行者的运行时交换:无人机的安全分析框架

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/MEMOCODE57689.2022.9954593

Alex Baird, H. Pearce, Srinivas Pinisetty, P. Roop

{"title":"Runtime Interchange of Enforcers for Adaptive Attacks: A Security Analysis Framework for Drones","authors":"Alex Baird, H. Pearce, Srinivas Pinisetty, P. Roop","doi":"10.1109/MEMOCODE57689.2022.9954593","DOIUrl":"https://doi.org/10.1109/MEMOCODE57689.2022.9954593","url":null,"abstract":"Unmanned aerial drones are Cyber-Physical Systems (CPSs) with increasing availability, popularity, and capability. Although other aeronautical and safety-critical industries apply stringent regulations and design approaches, smaller drones tend to have much weaker and informal design requirements. Due to the strong open-source movement in this space, there are numerous opportunities for malicious actors to find weaknesses to attack drone systems, and in parallel develop their own rogue drones. These factors present a risk of damage to people and property in addition to compromise of integrity and availability. However, a formal framework for ethical hacking that combines attacker modelling and launching of attacks is lacking in the literature. To this end, we leverage runtime enforcement, combined with the idea of suspension from synchronous programming to develop the first such formal framework. The proposed framework enables the modelling of complex attack vectors on drones. To facilitate this, we propose a bespoke policy-based runtime enforcement framework called enforcer interchange (EI). It is capable of both individual intent/target-specific attacks as well as more sophisticated combinations of attacks, which it manages by enabling and disabling attack enforcers at runtime in a context-aware manner. To demonstrate our framework, we utilise a quadcopter drone simulator and record the changes in the drone's behaviour as it executes a range of missions under different attacks. Our approach provides a framework for testing drones' resilience and defenses against malicious attacks, as well as exploring the capabilities of rogue drones.","PeriodicalId":157326,"journal":{"name":"2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114600697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Towards Efficient Input Space Exploration for Falsification of Input Signal Class Augmented STL 输入信号类增广STL伪证的有效输入空间探索

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/MEMOCODE57689.2022.9954597

Vinayak S. Prabhu, Meetkumar Savaliya

{"title":"Towards Efficient Input Space Exploration for Falsification of Input Signal Class Augmented STL","authors":"Vinayak S. Prabhu, Meetkumar Savaliya","doi":"10.1109/MEMOCODE57689.2022.9954597","DOIUrl":"https://doi.org/10.1109/MEMOCODE57689.2022.9954597","url":null,"abstract":"In recent years black-box optimization based search testing for Signal Temporal Logic (STL) specifications has been shown to be a promising approach for finding bugs in complex Cyber-Physical Systems (CPS) that are out of reach of formal analysis tools. The efficacy of this approach depends on efficiently exploring the input signal space, which for CPS is infinite. In this work, we present a framework for more efficient exploration of the input space for falsification of a class of engineering requirements. Our first contribution is a dimensionality reduction heuristic for optimization based falsification frameworks for dynamical systems over this augmented logic. This heuristic leverages the step response of the system - a standard system characteristic from Control engineering - to obtain a smaller time interval in which the optimizer needs to vary the inputs. Next, we note that system behaviors on a standard class of inputs such as on step inputs or sinusoids are often of paramount importance to engineers, and such inputs while easy to specify as functions, are difficult for temporal logics to capture. Our second contribution is a formalism to augment a commonly used fragment of Signal Temporal Logic (STL) to incorporate such signals for use in a black-box optimization based falsification framework. Finally, we demonstrate the effectiveness of our approach in falsification of temporal logic specifications on three case studies over complex Simulink models.","PeriodicalId":157326,"journal":{"name":"2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125222542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Reinforcement-Learning Style Algorithm for Black Box Automata 黑盒自动机的一种强化学习算法

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/MEMOCODE57689.2022.9954382

Itay Cohen, Roi Fogler, D. Peled

{"title":"A Reinforcement-Learning Style Algorithm for Black Box Automata","authors":"Itay Cohen, Roi Fogler, D. Peled","doi":"10.1109/MEMOCODE57689.2022.9954382","DOIUrl":"https://doi.org/10.1109/MEMOCODE57689.2022.9954382","url":null,"abstract":"The analysis of hardware and software systems is often applied to a model of a system rather than to the system itself. Obtaining a faithful model for a system may sometimes be a complex task. For learning the regular (finite automata) structure of a black box system, Angluin's $L^{*}$ algorithm and its successors employ membership and equivalence queries. The regular positive-negative inference (RPNI) family of algorithms use a less powerful capability of collecting observations for learning, with no control on selecting the inputs. We suggest and study here an alternative approach for learning, which is based on calculating utility values, obtained as a discounted sum of rewards, in the style of reinforcement learning. The utility values are used to classify the observed input prefixes into different states, and then to construct the learned automaton structure. We show cases where this classification is not enough to separate the prefixes, and subsequently remedy the situation by exploring deeper than the current prefix: checking the consistency between descendants of the current prefix that are reached with the same sequence of inputs. We show the connection of this algorithm with the RPNI algorithm and compare between these two approaches experimentally.","PeriodicalId":157326,"journal":{"name":"2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130587866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Creating a Language for Writing Real-Time Applications for the Internet of Things 创建一种用于编写物联网实时应用程序的语言

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/MEMOCODE57689.2022.9954383

Robert Krook, J. Hui, Bo Joel Svensson, S. Edwards, Koen Claessen

引用次数: 3

Reach-Avoid Verification for Time-varying Systems with Uncertain Disturbances 不确定扰动时变系统的达避验证

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/MEMOCODE57689.2022.9954600

Ruiqi Hu, Kairong Liu, Zhikun She

{"title":"Reach-Avoid Verification for Time-varying Systems with Uncertain Disturbances","authors":"Ruiqi Hu, Kairong Liu, Zhikun She","doi":"10.1109/MEMOCODE57689.2022.9954600","DOIUrl":"https://doi.org/10.1109/MEMOCODE57689.2022.9954600","url":null,"abstract":"In this work, we investigate the reach-avoid problem of a class of time-varying analytic systems with disturbances described by uncertain parameters. Firstly, by proposing the concepts of maximal and minimal reachable sets, we connect the avoidability and reachability with maximal and minimal reachable sets respectively. Then, for a given disturbance parameter, we introduce the evolution function for exactly describing the reachable set, and find a series representation of this evolution function with its Lie derivatives, which can also be regarded as a series function w.r.t. the uncertain parameter. Afterward, based on the partial sums of this series, over- and under-approximations of evolution function are constructed, which can be realized by interval arithmetics with designated precision. Further, we propose sufficient conditions for avoidability and reachability and design a numerical quantifier elimination based algorithm to verify these conditions; moreover, we improve the algorithm with a time-splitting technique. Finally, we implement the algorithm and use some benchmarks with comparisons to show that our methodology is both efficient and promising.","PeriodicalId":157326,"journal":{"name":"2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126657673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Runtime Verification for Clinically Interpretable Arrhythmia Classification 临床可解释心律失常分类的运行时间验证

2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) Pub Date : 2022-10-13 DOI: 10.1109/MEMOCODE57689.2022.9954594

Alex Baird, Srinivas Pinisetty, Nathan Allen, Nitish D. Patel, P. Roop

{"title":"Runtime Verification for Clinically Interpretable Arrhythmia Classification","authors":"Alex Baird, Srinivas Pinisetty, Nathan Allen, Nitish D. Patel, P. Roop","doi":"10.1109/MEMOCODE57689.2022.9954594","DOIUrl":"https://doi.org/10.1109/MEMOCODE57689.2022.9954594","url":null,"abstract":"Automatic detection of cardiac arrhythmia is an important tool in the fight against cardiovascular diseases and their associated human impacts. Such detection needs to be both accurate and timely, in order to allow for interventions to be administered within short time frames. Traditionally, such approaches have used black box implementations which are not explainable and hence have limited use in terms of clinical interpretability. Additionally, these implementations may either require additional training between patients, or have processing times which make them unsuitable for real-time classification. To address this, we develop a set of formal Timed Automaton-based policies that capture three common arrhythmia, Premature Ventricular Contraction, Ventricular Tachycardia, and Atrial Fibrilation, in terms of Electrocardiogram (ECG) features. We synthesise Runtime Verification monitors for each of these policies, and run them alongside existing clinical ECG databases to evaluate their efficacy. This approach shows comparable results to existing black box work with accuracies ranging from 90 % to 96 % while still being both explainable and clinically interpretable.","PeriodicalId":157326,"journal":{"name":"2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133786828","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0