Michael Holdgaard, T. Eriksen, A. Ravn, T. Andersen
{"title":"A distributed implementation of a mode switching control program","authors":"Michael Holdgaard, T. Eriksen, A. Ravn, T. Andersen","doi":"10.1109/EMWRTS.1995.514307","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514307","url":null,"abstract":"A distributed implementation of a mode switched control program for a robot is described. The design of the control program is given by a set of real-time automatons. One of them plans a schedule for switching between a fixed set of control functions, another dispatches the control functions according to the schedule, and a final one monitors the system for exceptions that shall lead to a halt. The implementation uses four transputers with a distribution of phases of the automatons over the individual processors. The main technical result of the paper is calculations that illustrate how to justify that the implementation meets real-time constraints.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127806437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Leskela, M. Salmela, M. Heikkinen, J. Hyvärinen
{"title":"Visualisation of real-time software in host-based simulation environment","authors":"J. Leskela, M. Salmela, M. Heikkinen, J. Hyvärinen","doi":"10.1109/EMWRTS.1995.514290","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514290","url":null,"abstract":"In the development of complex real time systems, design flaws often become visible only during the integration phase. This causes delays in the delivery of the product and compromises its quality, because, for efficient integration testing, a major part of the system has to be implemented. Tool support in the target hardware environment may also be inadequate for detecting the causes of errors. An approach of smoothing the transition from design models of real time software to actual implementations is proposed. It is based on simulating the target environment and operating system in the host workstation where the design takes place. The Implementation Animator (IA) is a tool for visualisation and testing of embedded real time software. It is a part of the IDERS toolset that facilitates integrated validation of heterogeneous system models consisting of executable specifications, design models and the final code.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124330061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SIGNAL GTi: implementing task preemption and time intervals in the synchronous data flow language SIGNAL","authors":"É. Rutten, Florent Martinez","doi":"10.1109/EMWRTS.1995.514309","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514309","url":null,"abstract":"This paper presents SIGNAL GTi, the encoding and implementation of an extension to the reactive data flow language SIGNAL with constructs for hierarchical task preemption. Tasks are defined as the association of a data-flow process with a time interval on which it is executed. The motivation for introducing these preemption structures is the need for the specification of different modes of interactions with the environment, and transitions between them (i.e. sequencing) an a nested way, especially in complex applications like robotics and discrete event control systems. A pre-processor to the SIGNAL compiler implements the encoding of the new constructs in the dataflow framework. This way, both data-flow and tasking paradigms are available within the same language-level framework, and the tools of the SIGNAL environment for optimization, simulation or proof are available.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117094817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Towards refinement in realtime programming","authors":"N. Nissanke","doi":"10.1109/EMWRTS.1995.514318","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514318","url":null,"abstract":"The objective of the research presented is the development of an approach for developing real time programs by successive refinement of abstract specifications. It is based on the approach by C. Morgan (1994), which assures the correctness of non real time sequential programs on the basis of the 'method of construction'. The consideration of time, however, makes the refinement a more complex task, primarily because the execution time of any program depends not only on the program itself but also on factors outside it, namely, on compiler strategies, architecture of the underlying machine, its run time environment and so on. Furthermore, real time programs may have explicitly specified timing constraints such as the arrival time of the request for program execution, the computation time and the deadline or the request period depending on whether the program is to be executed periodically or not. Production or communication time of data may also play a crucial role in real time programs. The paper introduces a framework for refinement in real time programs and a number of refinement rules. It demonstrates the approach using a case study.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128631269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"HyperReal One: the implementation, the environment and an example","authors":"Marco Agnoli, A. Poli, A. Verdino, F. Tisato","doi":"10.1109/EMWRTS.1995.514287","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514287","url":null,"abstract":"HyperReal One (HR1) is an experimental platform for hard real time (HRT) systems which has been developed in the context of the HyperReal project. It is focused on the experimentation of architectural abstractions related to configuration and timing or deeply embedded applications. HR1 introduces actors and connectors as basic components, plus a set of components (virtual clocks, plans, controller and configurator) supporting the configuration of the system and the planning of its activities at a programming in the large level. The control of the system behaviour is concentrated inside the controller, which relies on a time driven model. The paper describes the basic abstractions in term of abstract machines implemented as a hierarchy of C++ classes, and discusses an example highlighting how their use permits one to accommodate different user defined timing and control models in the same system.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116703099","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A performance study of several CSMA protocols for time constrained applications","authors":"J. A. Gil, A. Pont, J. J. Serrano","doi":"10.1109/EMWRTS.1995.514300","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514300","url":null,"abstract":"The paper compares the performance of several CSMA/CD protocols that can be easily implemented using the Intel microcontroller 83C152. These protocols are: CSMA/CD, CSMA/DCR and CSMA/CD with priorities. The behavior of these protocols was studied using typical workloads for time constrained applications that includes different kinds of data.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122490801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"FSR-a fair switching architecture","authors":"T. Pyssysalo, P. Raatikainen, Juha Zidbeck","doi":"10.1109/EMWRTS.1995.514301","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514301","url":null,"abstract":"The paper introduces a high speed interconnection network, the Frame Synchronized Ring (FSR), for use in broadband switching applications. The structure as well as the performance of the switching architecture are described and followed by deadlock and fairness analysis. Fair and deadlock free performance is analysed and proved by a predicate/transition net analysis tool, PROD. Finally, an example construction of an FSR based ATM switch is presented including some performance figures. Another example presents the FSR as a real time video switch, that switches and multiplexes several digitized video signals simultaneously with other high bit rate data connections.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130315888","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Increasing schedulability in distributed hard real-time systems","authors":"J. Javier Gutiérrez, M. G. Harbour","doi":"10.1109/EMWRTS.1995.514299","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514299","url":null,"abstract":"We present a study of the effects caused in distributed real time systems by jitter in the activation of tasks and messages. We show that although jitter has usually a small impact on the schedulability of single processor systems, in distributed architectures the worst case response times are significantly delayed. Reducing or eliminating jitter in these systems can increase the schedulability of the system up to 50% more than when jitter is permitted. Jitter can be prevented by using a bandwidth preserving scheduling algorithm such as the sporadic server. Since this kind of scheduling policy is not designed for communication networks, we describe how to adapt and implement the sporadic server algorithm for communication networks. Using the sporadic server both in the processors and networks, we can build distributed systems with up to 100% utilization of the CPUs and communication resources, while still guaranteeing that hard real time requirements are met.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132660428","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Real-time recursive procedures","authors":"Johann Blieberger, R. Lieger","doi":"10.1109/EMWRTS.1995.514316","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514316","url":null,"abstract":"The purpose of the paper is to show that recursive procedures can be used for implementing real time applications without harm, if a few conditions are met. These conditions ensure upper bounds for space and time requirements can be derived at compile time. Moreover they are simple enough such that many important recursive algorithms can be implemented, for example Mergesort or recursive tree traversal algorithms.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121960001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"MicroFaultTolerant (/spl mu/FT)-a system for achieving cost effective fault tolerance in microcontroller based equipment","authors":"S. A. Skavhaug, O. Pettersen","doi":"10.1109/EMWRTS.1995.514331","DOIUrl":"https://doi.org/10.1109/EMWRTS.1995.514331","url":null,"abstract":"MicroFaultTolerant (/spl mu/FT) is a method for designing and implementing microcontroller based equipment which interacts with its environment and has a risk connected to its operation thus making fault-tolerance and fail-to-safe properties necessary. We are especially concerned about systems where the \"safe\" states change at non-deterministic intervals with describing values changing continuously. In this paper we propose a method for achieving fault-tolerance and fail-to-safe properties, regarding certain particularly relevant error classes, in microcontroller based equipment.","PeriodicalId":156501,"journal":{"name":"Proceedings Seventh Euromicro Workshop on Real-Time Systems","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121965429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}