2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)最新文献

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Effect of thin gold film in Plasmonic based liquid Infiltrates Photonic Crystal Fiber Chemical Sensor:Design and analysis 金薄膜对等离子体基液体渗透光子晶体光纤化学传感器的影响:设计与分析
P. M, R. S
{"title":"Effect of thin gold film in Plasmonic based liquid Infiltrates Photonic Crystal Fiber Chemical Sensor:Design and analysis","authors":"P. M, R. S","doi":"10.1109/5nano53044.2022.9828920","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828920","url":null,"abstract":"Thin gold film-based liquid-filled elliptical core Photonic crystal fiber chemical sensor is modeled and analyzed. Finite element analysis method is used to optimize this design. The Selective metal coating method is applied to enhance the strong photon interaction and efficient Plasmon generation in the metal dielectric interface. The spectral sensitivity and loss peak are obtained in 620nm, 630nm at (1.32 to 1.35) Refractive Index (RI) values respectively. This sensor is applicable in the liquid and chemical sensing areas.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114572867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Parameterized Comparison of Carbon Nanotube and Graphene Nanoribbon Field Effective Transistor 碳纳米管与石墨烯纳米带场有效晶体管的参数化比较
Richa Patel, Akshar Joshi, Milan Nagariya, Aniket Vyas, Param Modi, Mahiraj Rathod, R. Parekh
{"title":"Parameterized Comparison of Carbon Nanotube and Graphene Nanoribbon Field Effective Transistor","authors":"Richa Patel, Akshar Joshi, Milan Nagariya, Aniket Vyas, Param Modi, Mahiraj Rathod, R. Parekh","doi":"10.1109/5nano53044.2022.9828951","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828951","url":null,"abstract":"In this paper, performance analysis of carbon nanotube field-effect transistors (CNTFET) and graphene nano-ribbon field-effect transistors (GNRFET) is done based on transfer characteristics, cut-off frequency, total charge, intrinsic delay, and transconductance by varying parameters such as temperature, oxide thickness, and channel length. After thorough investigation, it was inferred that gate-all- around CNTFET (GAA-CNTFET) and double-gate GNRFET (DG-GNRFET) had a better performance compared to back-gate CNTFET (BG-CNTFET) and back-gate GNRFET (BG-GNRFET). It’s observed that for higher values of voltages, GAA-CNTFET has almost 16.67% higher drain current than DG-GNRFET. The transconductance of GAA-CNTFET also outperforms DG-GNRFET for higher values of voltages. DG- GNRFETs have performed better compared to GAA- CNTFETs when it comes to cut-off frequency. At voltage around 1 V, when the temperature is kept constant, GAA-CNTFET shows 19.36 times more cut-off frequency than DG-GNRFET. Time delay of GAA- CNTFET is 33% more than DG-GNRFET when oxide thickness is 2nm.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130118553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Impact of Channel Thickness on the Performance of JL-DG MOSFET based NAND, NOR, and NOT Logic Gates 沟道厚度对基于JL-DG MOSFET的NAND、NOR和NOT逻辑门性能的影响
Srija Katharashala, Sahithya Gandla, Vamshi Bommineni, Shubham Tayal, Sresta Valasa, J. Ajayan
{"title":"Impact of Channel Thickness on the Performance of JL-DG MOSFET based NAND, NOR, and NOT Logic Gates","authors":"Srija Katharashala, Sahithya Gandla, Vamshi Bommineni, Shubham Tayal, Sresta Valasa, J. Ajayan","doi":"10.1109/5nano53044.2022.9828999","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828999","url":null,"abstract":"The ever-increasing demand for portable electronic devices has led to the downscaling of metal oxide semiconductor (MOS) field effect transistors (FETs). However, the downscaling of MOSFET beyond nanometer regime have been stuck by the presence of lethal short channel effects. These effects include velocity saturation, drain induced barrier lowering (DIBL), and quantum confinements etc. To overcome these effects researchers have introduced the double-gate (DG) MOSFET. However, the formation of abrupt junction at deep technology nodes is another constraint to downscaling of MOSFETs. To get rid of this problem, junctionless (JL) MOSFET comes into picture that have all the regions (source, channel, and drain) uniformly doped. Moreover, from digital IC point of view, logic gates are the basic building blocks. Also, the performance analysis of logic gates is an essential requirement to understand the performance of JL-DG-MOSFET for digital ICs. Subsequently, this paper presents the effect of JL-DG-MOSFET on the performance of fundamental logic gates like NOT, NAND, and NOR gate.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117238383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Tunable Plasmon Resonance in Asymmetric Plasmonic Cross-Bowtie Nanostructures 非对称等离子体交叉领结纳米结构中的可调谐等离子体共振
K. Dalal, Y. Sharma
{"title":"Tunable Plasmon Resonance in Asymmetric Plasmonic Cross-Bowtie Nanostructures","authors":"K. Dalal, Y. Sharma","doi":"10.1109/5nano53044.2022.9828941","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828941","url":null,"abstract":"An asymmetric crossed plasmonic nanobowtie nanostructure on a glass (SiO2) substrate is presented and numerically examined. The plasmon resonance and the electric-field enhancement obtained at the center of the crossed asymmetric bowties is modelled with the help of Finite Difference Time Domain (FDTD) simulator. The effect of the degree of asymmetricity in the flare angle of the bowties, the length of the bowties and the gap between the bowties on the nature of reflectance spectra is numerically computed and discussed. The proposed asymmetric plasmonic cross-bowtie nanostructures could be of significant importance for applications in biosensing, solid-state lighting, and fluorescence microscopy.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124299916","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Performance Analysis of Dielectrically Separated Independent Gates Junctionless DG-MOSFET: A Digital Perspective 介电分离独立门无结DG-MOSFET性能分析:数字视角
Navya Guduri, Divya Kannuri, Rajanikar Reddy Maram, Naveen Kumar Kevuloth, Sresta Valasa, Shubham Tayal
{"title":"Performance Analysis of Dielectrically Separated Independent Gates Junctionless DG-MOSFET: A Digital Perspective","authors":"Navya Guduri, Divya Kannuri, Rajanikar Reddy Maram, Naveen Kumar Kevuloth, Sresta Valasa, Shubham Tayal","doi":"10.1109/5nano53044.2022.9828882","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828882","url":null,"abstract":"Metal oxide semiconductor field effect transistors (MOSFET) have been downscaled in response to the growing need for small, battery-operated semiconductor devices. However, the existence of significant short channel effect has hindered MOSFET downscaling beyond the nanometer regime. Drain induced barrier lowering (DIBL), velocity saturation, and quantum confinement are examples of these phenomena. To minimize these adverse implications, researchers developed the double gate (DG) MOSFET. Furthermore, the formation of abrupt junctions at deep technological nodes is another barrier to MOSFET downscaling. To solve this problem, junctionless (JL) MOSFETs are used, which have uniform doping in all three areas (Source, Channel, and Drain).For the circuit’s efficient performance, we will use the dielectrically separated independent gates (DSIG) double gate MOSFET. Moreover, from digital IC point of view, logic gates are the basic building blocks and device dimensions play a critical role in their performance. Beyond that, we'll study at how the device dimensions of dielectric separated independent gates (DSIG) JL-DG-MOSFETs impact the behaviour of fundamental logic gates including NOT, NAND, and NOR.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117147524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Review on Stress Detection and Management Techniques using Nano EEG Sensors 基于纳米脑电图传感器的应力检测与管理技术综述
G. Praveena, J. M. Mathana
{"title":"Review on Stress Detection and Management Techniques using Nano EEG Sensors","authors":"G. Praveena, J. M. Mathana","doi":"10.1109/5nano53044.2022.9828889","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828889","url":null,"abstract":"The objective of this paper is to review recent researches on several stress prediction and detection techniques and also to provide better stream line on various stress management techniques. Worldwide, people experience mental stress concerns with different reasons including family issues, financial issues, social issues and environmental issues. The adjustable stress can develop a person; however, the strong response or continuous stress becomes critical. Hence, prediction, detection and management of physical and mental stress become important research area. It is necessary to predict the stress level earlier to avoid the major chronic health disorders to an individual’s well-being. Nowadays, depending on physiological measures such as Skin Conductance (SC), Heart Rate Variability (HRV), Electroencephalogram (EEG), Electromyogram (EMG), Electrocardiogram (ECG), Sleep Pattern, Galvanic Skin Response (GSR) and Skin Temperature more research is going to determine various stress detection techniques. The behaviour of physical and mental stress is studied with the help of emerging technology such as Internet of Things (IoT).The detected stress measurements are managed efficiently by cloud based work and smart phone applications to track and compute large data with long duration. In this review paper, the Nano based EEG sensors is developed for measuring the stress which avoids the number of sensors EEG electrodes when compared with the traditional it is reduced and the regular EEG sensor mounting problem is solved with proposed Nano EEG sensor.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114478932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Impact of Side-wall Spacer on The Performance of Double Gate Steep Switching Tunnel FET 侧壁间隔层对双栅陡开关隧道场效应管性能的影响
Satya Gopal Dinda, S. Iyer
{"title":"Impact of Side-wall Spacer on The Performance of Double Gate Steep Switching Tunnel FET","authors":"Satya Gopal Dinda, S. Iyer","doi":"10.1109/5nano53044.2022.9828898","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828898","url":null,"abstract":"The tunnel field effect transistor is a promising option for low power integrated circuit applications because it allows the possibility of steep switching between on and off states. The influence of various parameters on the performance of pocket doped double gate silicon n-type tunnel field effect transistor has been investigated with help of extensive device simulation for different space thickness and spacer dielectric values. The performance of the device is degraded significantly with increasing spacer thickness. The device is also subjected to low-k (k = 1, 2.8) as well as high-k (k = 9, 25) spacer dielectric but on current level not much altered.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125266594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
RF Performance Assessment of Sub-8nm GaN-SOI-FinFET Using Power Gain Parameters * 基于功率增益参数的Sub-8nm gan - soi finfet射频性能评估*
Ajay Kumar, N. Gupta, A. Goyal, Y. Massoud
{"title":"RF Performance Assessment of Sub-8nm GaN-SOI-FinFET Using Power Gain Parameters *","authors":"Ajay Kumar, N. Gupta, A. Goyal, Y. Massoud","doi":"10.1109/5nano53044.2022.9828977","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828977","url":null,"abstract":"In this work, we have presented, a radio frequency (RF) assessment of nanoscale gallium nitride-silicon-on-insulator fin field-effect transistor (GaN-SOI-FinFET). All the performances of the device have been compared with conventional FinFET (Conv. FinFET) simultaneously. All the results show that the power gains have significantly improved in terms of Gma, Gms, stern stability factor (SS), GMT, and intrinsic delay in comparison to conventional FinFET. Current gain unilateral power gain and have also been evaluated for the extraction of fT (cut-off frequency) and fMAX respectively. fT and fMAX enhance by 88.8% and 94.6% respectively. This analysis has been done at several THz frequencies. The implementation of GaN in the channel reduces the parasitic capacitance and paves the way for high-performance RF applications.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124573218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Thermal Performance of Dynamic Rail to Rail Voltage Comparators Designed Using 16nm Technology with a VDD of 0.7 V 采用VDD为0.7 V的16nm技术设计的动态轨对轨电压比较器的热性能
K. Shreya, Nayab Fatima, Koyada Samanvitha, Mekala Srilatha, J. Ajayan, Shubham Tayal
{"title":"Thermal Performance of Dynamic Rail to Rail Voltage Comparators Designed Using 16nm Technology with a VDD of 0.7 V","authors":"K. Shreya, Nayab Fatima, Koyada Samanvitha, Mekala Srilatha, J. Ajayan, Shubham Tayal","doi":"10.1109/5nano53044.2022.9828965","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828965","url":null,"abstract":"This article critically studies the role of operating temperature (T) on the speed & power characteristics of dynamic rail to rail voltage comparators implemented using 16 nm CMOS process with an operating voltage of 0.7 V. The thermal investigations have been carried out using SPICE tools. The input stages of the dynamic rail to rail (R to R) fully synthesizable voltage comparators considered in this work were implemented using 3-input NAND gates, 3-input NOR gates and 3-input NAND/NOR gates. The power consumed by the dynamic rail to rail fully synthesizable voltage comparators implemented using 3-input NAND gates, 3-input NOR gates and 3-input NAND/NOR gates are 5.81 µW, 3.6 µW and 8.78 µW respectively. The supreme low power characteristics of dynamic rail to rail fully synthesizable voltage comparators makes them most promising for next generation Internet of Things (IoT) applications.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122412466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
CNTFET: Comparative Study of Planar and Coaxial CNTFET:平面与同轴的比较研究
Priya Patel, Jaykumar Dave, Mohmadsohil Momin, Chirayu Sheth, Rushabh Gajab, Meet Dadhania, R. Parekh
{"title":"CNTFET: Comparative Study of Planar and Coaxial","authors":"Priya Patel, Jaykumar Dave, Mohmadsohil Momin, Chirayu Sheth, Rushabh Gajab, Meet Dadhania, R. Parekh","doi":"10.1109/5nano53044.2022.9828964","DOIUrl":"https://doi.org/10.1109/5nano53044.2022.9828964","url":null,"abstract":"We compare two different orientations of CNTFET in the present paper in order to assess their performance, which are planar and coaxial. Studies and investigation have been done by simulating other performance parameters like IV characteristics, density of state (DOS) vs. energy, potential vs. distance, transmission coefficient vs. energy, and density vs. distance. From the obtained results, it can be analyzed that both of the orientations perform differently at various parameters. For the same chirality and tube length (L = 5 nm and 20 nm), the max drain current for planner orientation is equal to 6 µA, and for coaxial, it is around 18 µA. In the density vs. distance plot for different chirality, the maximum density of charge carriers in coaxial is about 550 M/m at the center of the channel. For a planner, it is around 200 M/m. It is also observed that for planner CNTFET when the dielectric constant (k) increases from 16 to 80, there is a drastic change in current from around 7 µA to 25 µA, but for coaxial, it remains almost constant, which is 15 µA. So, from all this comparison, it was observed that coaxial outperformed planner CNTFET.","PeriodicalId":152207,"journal":{"name":"2022 IEEE International Conference on Nanoelectronics, Nanophotonics, Nanomaterials, Nanobioscience & Nanotechnology (5NANO)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132101784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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