NG-RES@HiPEAC最新文献_第2页

Real-Time Task Migration for Dynamic Resource Management in Many-Core Systems 多核系统中动态资源管理的实时任务迁移

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2020.5

Behnaz Pourmohseni, Fedor Smirnov, S. Wildermann, J. Teich

{"title":"Real-Time Task Migration for Dynamic Resource Management in Many-Core Systems","authors":"Behnaz Pourmohseni, Fedor Smirnov, S. Wildermann, J. Teich","doi":"10.4230/OASIcs.NG-RES.2020.5","DOIUrl":"https://doi.org/10.4230/OASIcs.NG-RES.2020.5","url":null,"abstract":"Dynamic resource management strategies in embedded many-core systems rely on task migration to adapt the deployment (mapping) of applications dynamically, e.g., for thermal/power management or load balancing. In case of hard real-time applications, however, the current practice of on-line application adaptation is limited to reconfiguring the whole application between a set of statically computed mappings with statically verified timing guarantees. This heavily restricts the application’s adaptability. To enable hard real-time task migrations in many-core systems without relying on a static analysis, this paper presents (i) a predictable task migration mechanism supported with (ii) a lightweight migration timing analysis and (iii) a lightweight migration timing feasibility check which can be applied on-line to bound on the worst-case temporal overhead of a migration and examine the admissibility of this overhead w.r.t. the hard real-time requirements of the application. For a variety of applications and many-core platforms, we experimentally demonstrate the feasibility of hard real-time task migrations, the lightness of the proposed timing analysis and feasibility check for on-line use, and the advantage of the proposed task migration approach over mapping reconfiguration as the state-of-the-art real-time adaptation approach for many-core systems.","PeriodicalId":151755,"journal":{"name":"NG-RES@HiPEAC","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116730259","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

EDF Scheduling and Minimal-Overlap Shortest-Path Routing for Real-Time TSCH Networks 实时TSCH网络的EDF调度和最小重叠最短路径路由

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2021.2

Miguel Gutiérrez Gaitán, Luís Almeida, P. Santos, P. Yomsi

{"title":"EDF Scheduling and Minimal-Overlap Shortest-Path Routing for Real-Time TSCH Networks","authors":"Miguel Gutiérrez Gaitán, Luís Almeida, P. Santos, P. Yomsi","doi":"10.4230/OASIcs.NG-RES.2021.2","DOIUrl":"https://doi.org/10.4230/OASIcs.NG-RES.2021.2","url":null,"abstract":"With the scope of Industry 4.0 and the Industrial Internet of Things (IIoT), wireless technologies have gained momentum in the industrial realm. Wireless standards such as WirelessHART, ISA100.11a, IEEE 802.15.4e and 6TiSCH are among the most popular, given their suitability to support real-time data traffic in wireless sensor and actuator networks (WSAN). Theoretical and empirical studies have covered prioritized packet scheduling in extenso, but only little has been done concerning methods that enhance and/or guarantee real-time performance based on routing decisions. In this work, we propose a greedy heuristic to reduce overlap in shortest-path routing for WSANs with packet transmissions scheduled under the earliest-deadline-first (EDF) policy. We evaluated our approach under varying network configurations and observed remarkable dominance in terms of the number of overlaps, transmission conflicts, and schedulability, regardless of the network workload and connectivity. We further observe that well-known graph network parameters, e.g., vertex degree, density, betweenness centrality, etc., have a special influence on the path overlaps, and thus provide useful insights to improve the real-time performance of the network. 2012 ACM Subject Classification Computer systems organization → Real-time systems; Networks → Network algorithms; Networks → Data path algorithms","PeriodicalId":151755,"journal":{"name":"NG-RES@HiPEAC","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129028390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Response Time Analysis for RT-MQTT Protocol Grounded on SDN 基于SDN的RT-MQTT协议响应时间分析

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2023.5

Ehsan Shahri, P. Pedreiras, L. Almeida

{"title":"Response Time Analysis for RT-MQTT Protocol Grounded on SDN","authors":"Ehsan Shahri, P. Pedreiras, L. Almeida","doi":"10.4230/OASIcs.NG-RES.2023.5","DOIUrl":"https://doi.org/10.4230/OASIcs.NG-RES.2023.5","url":null,"abstract":"The current industry trend is to replace the use of custom components with standards-based Commercially available Off-The-Shelf (COTS) based hardware and protocols. Furthermore, the emergence of new industrial paradigms, such as Industry 4.0 and the Industrial Internet of Things, sets additional requirements regarding e.g. scale, transparency, agility, flexibility and efficiency. Therefore, in these domains, application layer protocols such as Message Queuing Telemetry Transport protocol (MQTT) are gaining popularity, in result of their simplicity, scalability, low resource-usage and decoupling between end nodes. However, such protocols were not designed for real-time applications, missing key features such as determinism and latency bounds. A recent work proposed extending MQTT with real-time services, taking advantage of Software Defined Networking (SDN) to manage the network resource. These extensions allow applications to specify real-time requirements that are then captured by a resource manager and used to reserve the necessary resources at the network layer. This paper shows that such MQTT extended architecture is analyzable from a worst-case timing perspective. We derive a system model that captures the real-time features and we present a response-time analysis to assess the schedulability of the real-time traffic. Finally, we validate the analysis with a set of experimental results.","PeriodicalId":151755,"journal":{"name":"NG-RES@HiPEAC","volume":" 10","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132075176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

IRQ Coloring: Mitigating Interrupt-Generated Interference on ARM Multicore Platforms IRQ着色:在ARM多核平台上减轻中断产生的干扰

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2023.2

Diogo Costa, L. Cuomo, Daniel de Oliveira, I. M. Savino, Bruno Morelli, José Martins, Fabrizio Tronci, A. Biasci, S. Pinto

{"title":"IRQ Coloring: Mitigating Interrupt-Generated Interference on ARM Multicore Platforms","authors":"Diogo Costa, L. Cuomo, Daniel de Oliveira, I. M. Savino, Bruno Morelli, José Martins, Fabrizio Tronci, A. Biasci, S. Pinto","doi":"10.4230/OASIcs.NG-RES.2023.2","DOIUrl":"https://doi.org/10.4230/OASIcs.NG-RES.2023.2","url":null,"abstract":"Mixed-criticality systems, which consolidate workloads with different criticalities, must comply with stringent spatial and temporal isolation requirements imposed by safety-critical standards (e.g., ISO26262). This, per se, has proven to be a challenge with the advent of multicore platforms due to the inner interference created by multiple subsystems while disputing access to shared resources. With this work, we pioneer the concept of Interrupt (IRQ) coloring as a novel mechanism to minimize the interference created by co-existing interrupt-driven workloads. The main idea consists of selectively deactivating specific (“colored”) interrupts if the Quality of Service (QoS) of critical workloads (e.g., Virtual Machines) drops below a well-defined threshold. The IRQ Coloring approach encompasses two artifacts, i.e., the IRQ Coloring Design-Time Tool (IRQ DTT) and the IRQ Coloring Run-Time Mechanism (IRQ RTM). In this paper, we focus on presenting the conceptual IRQ coloring design, describing the first prototype of the IRQ RTM on Bao hypervisor, and providing initial evidence about the effectiveness of the proposed approach on a synthetic use case.","PeriodicalId":151755,"journal":{"name":"NG-RES@HiPEAC","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116149186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Event-Based Control Enters the Real-Time World: Perspectives and Pitfalls 基于事件的控制进入实时世界:视角和陷阱

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2021.4

Silvano Seva, W. Fornaciari, A. Leva

引用次数: 0

A Comparative Evaluation of Latency-Aware Energy Optimization Approaches in Many-Core Systems (Invited Paper) 多核系统中延迟感知能量优化方法的比较评价(特邀论文)

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2021.1

Khalil Esper, S. Wildermann, J. Teich

{"title":"A Comparative Evaluation of Latency-Aware Energy Optimization Approaches in Many-Core Systems (Invited Paper)","authors":"Khalil Esper, S. Wildermann, J. Teich","doi":"10.4230/OASIcs.NG-RES.2021.1","DOIUrl":"https://doi.org/10.4230/OASIcs.NG-RES.2021.1","url":null,"abstract":"Many applications vary a lot in execution time depending on their workload. A prominent example is image processing applications, where the execution time is dependent on the content or the size of the processed input images. An interesting case is when these applications have quality-of-service requirements such as soft deadlines, that they should meet as good as possible. A further complicated case is when such applications have one or even multiple further objectives to optimize like, e.g., energy consumption. Approaches that dynamically adapt the processing resources to application needs under multiple optimization goals and constraints can be characterized into the application-specific and feedbackbased techniques. Whereas application-specific approaches typically statically use an offline stage to determine the best configuration for each known workload, feedback-based approaches, using, e.g., control theory, adapt the system without the need of knowing the effect of workload on these goals. In this paper, we evaluate a state-of-the-art approach of each of the two categories and compare them for image processing applications in terms of energy consumption and number of deadline misses on a given many-core architecture. In addition, we propose a second feedback-based approach that is based on finite state machines (FSMs). The obtained results suggest that whereas the state-of-the-art application-specific approach is able to meet a specified latency deadline whenever possible while consuming the least amount of energy, it requires a perfect characterization of the workload on a given many-core system. If such knowledge is not available, the feedback-based approaches have their strengths in achieving comparable energy savings, but missing deadlines more often. 2012 ACM Subject Classification Hardware→ Power and energy; Hardware→ Finite state machines; Computing methodologies → Computational control theory; Computer systems organization → Self-organizing autonomic computing","PeriodicalId":151755,"journal":{"name":"NG-RES@HiPEAC","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133918422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

M2OS-Mc: An RTOS for Many-Core Processors m20s - mc:多核处理器的实时操作系统

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2021.5

David García Villaescusa, M. A. Rivas, M. G. Harbour

{"title":"M2OS-Mc: An RTOS for Many-Core Processors","authors":"David García Villaescusa, M. A. Rivas, M. G. Harbour","doi":"10.4230/OASIcs.NG-RES.2021.5","DOIUrl":"https://doi.org/10.4230/OASIcs.NG-RES.2021.5","url":null,"abstract":"A current trend of industrial systems is reducing space, weight and power (SWaP) through the allocation of different applications on a single chip. This is enabled by the continued improvement of semiconductor technology which allows the integration of multiple cores in a single processor chip, as the processors are prevented to continue increasing their clock rate due to the “power-wall”. The use of Commercial-Off-The-Shelf (COTS) multi-core processors for real-time purposes presents issues due to the shared bus used to access the shared memory. An alternative to the use of multi-core processors are the many-core processors with tens to hundreds of processors in the same chip, using different scalable ways to interconnect their cores. This paper presents the adaptation of the M2OS Real-Time Operating System (RTOS) and its simplified Ada run-time for mesh-based many-core processors. This RTOS is called M2OS-mc and has been tested on the Epiphany III many-core processor (referred in this paper simply as Epiphany), a many-core which has 16 cores connected by a Network-on-Chip (NoC) consisting of a 4x4 2D mesh. In order to have a synchronized way to send messages between tasks through the NoC independently of the core where they are being executed, we provide sampling port communication primitives. 2012 ACM Subject Classification Computer systems organization → Real-time operating systems","PeriodicalId":151755,"journal":{"name":"NG-RES@HiPEAC","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122396735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Overlapping-Horizon MPC: A Novel Approach to Computational Constraints in Real-Time Predictive Control 重叠视界MPC:实时预测控制中计算约束的新方法

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2022.3

A. Leva, S. Formentin, Silvano Seva

引用次数: 2

Beyond the Threaded Programming Model on Real-Time Operating Systems 超越实时操作系统上的线程编程模型

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2023.3

E. Jellum, Shaokai Lin, P. Donovan, Efsane Soyer, Fuzail Shakir, T. Bryne, M. Orlandić, Marten Lohstroh, Edward A. Lee

{"title":"Beyond the Threaded Programming Model on Real-Time Operating Systems","authors":"E. Jellum, Shaokai Lin, P. Donovan, Efsane Soyer, Fuzail Shakir, T. Bryne, M. Orlandić, Marten Lohstroh, Edward A. Lee","doi":"10.4230/OASIcs.NG-RES.2023.3","DOIUrl":"https://doi.org/10.4230/OASIcs.NG-RES.2023.3","url":null,"abstract":"The use of a real-time operating system (RTOS) raises the abstraction level for embedded systems design when compared to traditional bare-metal programming, resulting in simpler and more reusable application code. Modern RTOSes for resource-constrained platforms, like Zephyr and FreeRTOS, also offer threading support, but this kind of shared memory concurrency is a poor fit for expressing the reactive and interactive behaviors that are common in embedded systems. To address this, alternative concurrency models like the actor model or communicating sequential processes have been proposed. While those alternatives enable reactive design patterns, they fail to deliver determinism and do not address timing. This makes it difficult to verify that implemented behavior is as intended and impossible to specify timing constraints in a portable way. This makes it hard to create reusable library components out of common embedded design patterns, forcing developers to keep reinventing the wheel for each application and each platform. In this paper, we introduce the embedded target of Lingua Franca (LF) as a means to move beyond the threaded programming model provided by RTOSes and improve the state of the art in embedded programming. LF is based on the reactor model of computation, which is reactive, deterministic, and timed, providing a means to express concurrency and timing in a platform-independent way. We compare the performance of LF versus threaded C code – both running on Zephyr – in terms of response time, timing precision, throughput, and memory footprint.","PeriodicalId":151755,"journal":{"name":"NG-RES@HiPEAC","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129363030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Multi-Requirement Enforcement of Non-Functional Properties on MPSoCs Using Enforcement FSMs - A Case Study 在mpsoc上使用强制FSMs实现非功能属性的多需求强制-一个案例研究

NG-RES@HiPEAC Pub Date : 1900-01-01 DOI: 10.4230/OASIcs.NG-RES.2022.2

Khalil Esper, S. Wildermann, J. Teich

引用次数: 3