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Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94最新文献

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Interior point methods for placement 放置的内部点方法
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.408782
P. Chin, A. Vannelli
{"title":"Interior point methods for placement","authors":"P. Chin, A. Vannelli","doi":"10.1109/ISCAS.1994.408782","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.408782","url":null,"abstract":"In VLSI layout optimization, the placement problem is usually solved with simulated annealing or heuristic algorithms. These procedures often begin with random initial configurations but may benefit greatly (in terms of execution time or quality of solution) when good initial relative placements are provided. Weis and Mlynski [1987] have presented a linear programming formulation for generating relative placements. In this paper, we show how efficient interior point and preconditioned conjugate gradient methods can be applied to solve large sparse linear programs based on Weis and Mlynski's approach.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"20 S2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133110229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
On generalization of order statistics based filters 基于序统计量的滤波器的泛化
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.408959
Ji-Nan Lin, R. Unbehauen
{"title":"On generalization of order statistics based filters","authors":"Ji-Nan Lin, R. Unbehauen","doi":"10.1109/ISCAS.1994.408959","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.408959","url":null,"abstract":"The generalization of order statistics (OS) based filters which are a useful class of nonlinear digital filters, is considered from two aspects. The piecewise-linear characteristics of OS based filters are first investigated, which indicates the direction of generalizing them in the set of piecewise-linear filters. The second way of the generalization considered here is through approximating an OS based filter by a filter of a general type. In both cases, the newly developed CPWL filter plays an important role.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131418350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Multipurpose chip for physiological measurements 多用途的生理测量芯片
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.409245
Maini Williams, J. Nurmi
{"title":"Multipurpose chip for physiological measurements","authors":"Maini Williams, J. Nurmi","doi":"10.1109/ISCAS.1994.409245","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.409245","url":null,"abstract":"The idea of a multipurpose chip for the measurement of physiological signals is discussed here. First, the general idea of the chip consisting of an amplifier, a sigma-delta analog-to-digital converter (ADC) and a digital filter is presented. Then the possible implementation alternatives, specifications and, finally, the linear phase filters to maintain some important features in the signal are discussed.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133803213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A new retiming algorithm for circuit design 一种新的电路重定时算法
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.409190
S. Simon, E. Bernard, M. Sauer, J. Nossek
{"title":"A new retiming algorithm for circuit design","authors":"S. Simon, E. Bernard, M. Sauer, J. Nossek","doi":"10.1109/ISCAS.1994.409190","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.409190","url":null,"abstract":"This paper deals with retiming, a register reconfiguration technique, introduced by Leiserson and Saxe (1983 and 1991), to speed up VLSI circuits. Retiming is generally formulated as an optimization problem which is solvable applying linear-programming algorithms. This work presents a different way of considering retiming. A loop analysis, related to network theory, is developed to evaluate all possible retiming solutions. Based on the circuit model used in Leiserson's paper, the incidence matrix of the circuit is formulated in order to find the linearly independent loops which are needed to represent all register configurations. Finally, the set of all retiming solutions is efficiently reduced to those, which fulfil design and timing constraints and thus, the designer is able to choose an appropriate one for implementation.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115242344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
Zero-voltage switching in switched current circuits 开关电流电路中的零电压开关
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.409364
D. Nairn
{"title":"Zero-voltage switching in switched current circuits","authors":"D. Nairn","doi":"10.1109/ISCAS.1994.409364","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.409364","url":null,"abstract":"Traditionally the accuracy of switched-current circuits has been much lower than that of switched-capacitor circuits. To address this problem, an accurate high-speed switched-current sample-and-hold technique based on zero-voltage switching is presented. The technique significantly reduces the signal dependent charge injection, leading to improved sampling accuracy. To demonstrate the proposed technique, a sample-and-hold has been implemented using a 1.2 /spl mu/m CMOS process. The circuit is expected to achieve 14 bit linearity at sampling rates exceeding 50 M Samples/sec. While dissipating only 3.5 mW from a nominal 3.3 V supply.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115823544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 41
Almost distortion-free IIR subband filters using a nested structure 使用嵌套结构的几乎无失真的IIR子带滤波器
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.408965
S. R. Pillai, G. H. Allen
{"title":"Almost distortion-free IIR subband filters using a nested structure","authors":"S. R. Pillai, G. H. Allen","doi":"10.1109/ISCAS.1994.408965","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.408965","url":null,"abstract":"In this paper almost-perfect reconstruction techniques for m-channel multirate systems are investigated. It is shown here that using two allpass filters it is possible to generate a three channel filter bank that eliminates various errors caused by the analysis/synthesis system. In particular, a technique to cancel alias and magnitude distortion is outlined here. It is also shown that the classical two channel synthesis filter is a special case of the proposed synthesis filter bank selection procedure. Illustrative example and design algorithms are included to supplement the theory.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124265735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IC implementation of switched capacitor chaotic neuron 开关电容混沌神经元的集成电路实现
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.409535
Y. Horio, K. Suyama
{"title":"IC implementation of switched capacitor chaotic neuron","authors":"Y. Horio, K. Suyama","doi":"10.1109/ISCAS.1994.409535","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.409535","url":null,"abstract":"IC implementation of chaotic neuron using switched capacitor circuit technique is described. Various measured results are presented and interpreted. A new phenomenon called \"transient chaos\", which is essential for chaotic simulated annealing, is also demonstrated.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124270656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
A temporal averaging technique for direction of arrival estimation in a multipath environment 一种用于多径环境下到达方向估计的时间平均技术
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.409066
D. Pal
{"title":"A temporal averaging technique for direction of arrival estimation in a multipath environment","authors":"D. Pal","doi":"10.1109/ISCAS.1994.409066","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.409066","url":null,"abstract":"A new procedure is proposed for estimating directions of arrival (DOA) of multipaths in multipath channels. Assuming finite support, a finite matrix description of the channel is derived. A sufficient condition for computing the DOAs is that the rank of this matrix be at least equal to the number of multipaths. This condition need not hold at all times, especially when the channel length in number of symbols is smaller than the number of multipaths. Usually this problem is solved via a so called spatial smoothing approach. But spatial smoothing requires a large array of antennas as it needs averaging over a number of subarrays (each subarray being larger than the number of significant multipaths). The new technique does not require extra antennas and computes the DOAs as long as the path delays are distinct.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124273223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Floating point addition errors and their effect on the roundoff noise in digital signal processing 数字信号处理中浮点加法误差及其对舍入噪声的影响
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.408920
F. Hartwig, A. Lacroix
{"title":"Floating point addition errors and their effect on the roundoff noise in digital signal processing","authors":"F. Hartwig, A. Lacroix","doi":"10.1109/ISCAS.1994.408920","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.408920","url":null,"abstract":"An improved adder model is derived which takes into account correlations between signal and error. For different adder strategies is shown the influence of the improved adder model on the estimated of the resulting SNR.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124295016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Dynamic characteristics of a digital transducer 数字换能器的动态特性
Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 Pub Date : 1994-05-30 DOI: 10.1109/ISCAS.1994.409515
Pa Littlehales, C. P. Lewis, S. Bishop
{"title":"Dynamic characteristics of a digital transducer","authors":"Pa Littlehales, C. P. Lewis, S. Bishop","doi":"10.1109/ISCAS.1994.409515","DOIUrl":"https://doi.org/10.1109/ISCAS.1994.409515","url":null,"abstract":"Sigma delta (/spl Sigma/-/spl Delta/) modulation is a technique that is widely used in a variety of signal processing and conditioning applications. This discrete data, closed loop, nonlinear device employs oversampling techniques to achieve a suitable signal to noise ratio. The modulator may be considered to be a control system in which the discrete output signal tracks an analogue input signal to provide analogue to digital conversion. Digital implementation of the circuits in VLSI silicon chip packages has many advantages over analogue equivalents such as size, cost and sensitivity to interference. The authors describe the implementation of digital transducers using /spl Sigma/-/spl Delta/ techniques.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114492999","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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