{"title":"Zero-voltage switching in switched current circuits","authors":"D. Nairn","doi":"10.1109/ISCAS.1994.409364","DOIUrl":null,"url":null,"abstract":"Traditionally the accuracy of switched-current circuits has been much lower than that of switched-capacitor circuits. To address this problem, an accurate high-speed switched-current sample-and-hold technique based on zero-voltage switching is presented. The technique significantly reduces the signal dependent charge injection, leading to improved sampling accuracy. To demonstrate the proposed technique, a sample-and-hold has been implemented using a 1.2 /spl mu/m CMOS process. The circuit is expected to achieve 14 bit linearity at sampling rates exceeding 50 M Samples/sec. While dissipating only 3.5 mW from a nominal 3.3 V supply.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"41","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.1994.409364","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 41
Abstract
Traditionally the accuracy of switched-current circuits has been much lower than that of switched-capacitor circuits. To address this problem, an accurate high-speed switched-current sample-and-hold technique based on zero-voltage switching is presented. The technique significantly reduces the signal dependent charge injection, leading to improved sampling accuracy. To demonstrate the proposed technique, a sample-and-hold has been implemented using a 1.2 /spl mu/m CMOS process. The circuit is expected to achieve 14 bit linearity at sampling rates exceeding 50 M Samples/sec. While dissipating only 3.5 mW from a nominal 3.3 V supply.<>