A new retiming algorithm for circuit design

S. Simon, E. Bernard, M. Sauer, J. Nossek
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引用次数: 26

Abstract

This paper deals with retiming, a register reconfiguration technique, introduced by Leiserson and Saxe (1983 and 1991), to speed up VLSI circuits. Retiming is generally formulated as an optimization problem which is solvable applying linear-programming algorithms. This work presents a different way of considering retiming. A loop analysis, related to network theory, is developed to evaluate all possible retiming solutions. Based on the circuit model used in Leiserson's paper, the incidence matrix of the circuit is formulated in order to find the linearly independent loops which are needed to represent all register configurations. Finally, the set of all retiming solutions is efficiently reduced to those, which fulfil design and timing constraints and thus, the designer is able to choose an appropriate one for implementation.<>
一种新的电路重定时算法
本文讨论了重定时,一种寄存器重构技术,由Leiserson和Saxe(1983年和1991年)提出,以加快VLSI电路。重定时通常被表述为一个优化问题,可以用线性规划算法求解。这项工作提出了一种考虑重新计时的不同方式。一种与网络理论相关的循环分析,被用来评估所有可能的重新定时解决方案。基于Leiserson论文中使用的电路模型,为了找到表示所有寄存器配置所需的线性无关环路,我们建立了电路的关联矩阵。最后,将所有重定时解的集合有效地简化为满足设计和时间约束的解,从而使设计人员能够选择合适的重新定时解进行实现
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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