{"title":"A new retiming algorithm for circuit design","authors":"S. Simon, E. Bernard, M. Sauer, J. Nossek","doi":"10.1109/ISCAS.1994.409190","DOIUrl":null,"url":null,"abstract":"This paper deals with retiming, a register reconfiguration technique, introduced by Leiserson and Saxe (1983 and 1991), to speed up VLSI circuits. Retiming is generally formulated as an optimization problem which is solvable applying linear-programming algorithms. This work presents a different way of considering retiming. A loop analysis, related to network theory, is developed to evaluate all possible retiming solutions. Based on the circuit model used in Leiserson's paper, the incidence matrix of the circuit is formulated in order to find the linearly independent loops which are needed to represent all register configurations. Finally, the set of all retiming solutions is efficiently reduced to those, which fulfil design and timing constraints and thus, the designer is able to choose an appropriate one for implementation.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"26","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.1994.409190","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 26
Abstract
This paper deals with retiming, a register reconfiguration technique, introduced by Leiserson and Saxe (1983 and 1991), to speed up VLSI circuits. Retiming is generally formulated as an optimization problem which is solvable applying linear-programming algorithms. This work presents a different way of considering retiming. A loop analysis, related to network theory, is developed to evaluate all possible retiming solutions. Based on the circuit model used in Leiserson's paper, the incidence matrix of the circuit is formulated in order to find the linearly independent loops which are needed to represent all register configurations. Finally, the set of all retiming solutions is efficiently reduced to those, which fulfil design and timing constraints and thus, the designer is able to choose an appropriate one for implementation.<>