2006 IEEE International Conference on Semiconductor Electronics最新文献_第5页

Fabrication of Platinum Membrane on Silicon for MEMS Microphone MEMS传声器用硅基铂膜的制备

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.381010

A. A. Hamzah, B. Y. Majlis, I. Ahmad

引用次数: 2

Nanoporous InN Films Synthesized using Photoelectrochemical (PEC) Wet Etching 利用光电化学(PEC)湿法蚀刻合成纳米多孔InN薄膜

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.380706

L. S. Chuah, Z. Hassan, F. Yam, H. Abu Hassan

{"title":"Nanoporous InN Films Synthesized using Photoelectrochemical (PEC) Wet Etching","authors":"L. S. Chuah, Z. Hassan, F. Yam, H. Abu Hassan","doi":"10.1109/SMELEC.2006.380706","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.380706","url":null,"abstract":"In this study, we have investigated the structural characteristics of nanoporous InN prepared by photoelectrochemical (PEC) wet etching. The PEC process which uses various 0.2, 0.5 and 1.0 wt% aqueous potassium hydroxide (KOH) solution utilizes photogenerated electron-hole pairs to enhance oxidation and reduction reactions taking place in an electrochemical cell. For etching condition using 0.2 wt% KOH solution (sample B), surface became relatively rough, however no pore was found. SEM images show that average pore size for sample C (0.5 wt% KOH solution) and sample D (1.0 wt% KOH solution) was around 30 to 60 nm. However, from our analysis of porous InN prepared by varying the etching condition, the non uniform etch rate across the sample surface is limited by diffusion processes. From the X-ray diffraction scan, porous samples show a broadening of the full width at half maximum with respect to the as-grown InN epilayer. On the other hand, the peak shift for InN (0002) and GaN (0002) diffraction planes was inconsistent. This can be explained by the relatively smaller statistical size distribution of the pores.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131159840","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Effect of Mesa Spacing on the Electrical Properties of Mesa Isolation in High Electron Mobility Transistor Structures 高电子迁移率晶体管结构中台地间距对台地隔离电性能的影响

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.380682

H. Hashim, M. K. Othman, M. N. Osman, A. Dolah, M. Yahya

引用次数: 0

Design of Single-Stage Folded-Cascode Gain Boost Amplifier for 100mW 10-bit 50MS/s Pipelined Analog-to-Digital Converter 用于100mW 10位50MS/s流水线模数转换器的单级折叠级码增益放大器设计

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.380747

R. Musa, Y. Yusoff, T. Yew, M. Ahmad

引用次数: 20

TCAD Simulation of STI Stress Effect on Active Length for 130nm Technology STI应力对130nm工艺有效长度影响的TCAD仿真

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.380798

W.R.W. Ahmad, A. Kordesch, I. Ahmad, P. Yew

引用次数: 3

Analysis of a Bilaminar Circular Piezoelectric Actuator for Micropumps 微泵用双层圆形压电驱动器的分析

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.381029

J. Johari, B. Majlis

引用次数: 2

Reduction of Turn-On Voltage in a Single Layer Structured Organic Light-Emitting Diode using Nanocomposites SiO2:PHF 利用纳米复合材料SiO2:PHF降低单层结构有机发光二极管的导通电压

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.381025

T. Aziz, M. Salleh, M. Umar, M. Yahaya

引用次数: 0

Organic Light Emitting Diode (OLED) Using Different Hole Transport and Injecting Layers 采用不同空穴传输和注入层的有机发光二极管(OLED

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.381034

M. K. Othman, M. M. Salleh, A. Mat

{"title":"Organic Light Emitting Diode (OLED) Using Different Hole Transport and Injecting Layers","authors":"M. K. Othman, M. M. Salleh, A. Mat","doi":"10.1109/SMELEC.2006.381034","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.381034","url":null,"abstract":"This paper reports the various structures and performances improvements using different hole transporting layer in OLED based on DPVBi as emitter. Here the indium tin oxide (ITO) used as an anode, copper pthalocyanine (CuPc) as the hole injecting layer, PEDOT:PSS and poly-9- vinylcarbozole (PVK) as hole transporting layer, 4,4'-bis(2,2'diphenilvinyl)-1,1' -biphenyl (DPVBi) as the blue emitting layer and aluminum (Al) as the cathode. The CuPc and DPVBi were prepared by thermal evaporation while the PEDOT:PSS and PVK films were prepared using spin coating technique. The effect of inserting additional layer of CuPc, PVK and PEDOT:PSS between anode and the emitting layers was analyzed through the current-voltage (IV) curves and the electroluminescence spectra. The additional layer structure was found to increase the maximum luminance compared to that one of single layer device. The used of PVK as hole transporting layer has improved the diode properties of the device and able to prevent the device from short circuits. The optimized DPVBi layer thickness was observed at 56 nm and the insertion of 10 nm CuPc hole injecting layer show the device reduce it turn on voltage from 7.0 V to 6.5 V.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125124263","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A Highly Compatible Architecture Design for Optimum FPGA to Structured-ASIC Migration FPGA向结构化asic迁移的高兼容架构设计

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.381114

Hee Kong Phoon, M. Yap, Chuan Khye Chai

引用次数: 11

VLSI Implementation of 1/2 Viterbi Decoder for IEEE P802.15-3a UWB Communication IEEE P802.15-3a超宽带通信1/2 Viterbi解码器的VLSI实现

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI: 10.1109/SMELEC.2006.380717

M. Siswanto, M. Othman, E. Zahedi

引用次数: 7