{"title":"Scalable topological data analysis for life science applications","authors":"A. Kalyanaraman","doi":"10.1145/3457388.3459983","DOIUrl":"https://doi.org/10.1145/3457388.3459983","url":null,"abstract":"Enabling discoveries and foundational understanding in modern day life sciences have largely become centered on our ability to effectively analyze large swathes of complex data from a diverse range of sources, capturing complex information encapsulated across the different layers of the nature-built system. While this data-centric approach has been the primary driver in computational life sciences and discovery pipelines for several decades now, the field has decisively diverged in the last few years on how and why these data are collected. More specifically, in contrast to yesteryear genomic and other -omic projects, modern day data collection by and large happens in an analysis-agnostic fashion---i.e., complex data are collected without any specific hypotheses to drive them; instead data are being collected because of easy availability of affordable high-throughput technologies. This has led to a fundamental shift in how we process these data and what we could glean from these data. In this work, we present a novel algorithmic and software framework called Hyppo-X, which is based on algebraic topology to discover hidden structure within complex biological data sets [1, 3]. Topology is the field of computational mathematics that deals with structure at large. Computational topology and its applications constitute an emerging area of research with ample scope for development and data-driven discovery. We present results of our extensive collaborative studies in developing and applying our methods to analyze two types of data---plant phenomics data obtained from agricultural fields [2], and patient trajectories obtained from a network of hospitals toward antimicrobial stewardship [4]. Topological data analysis holds tremendous promise to model and analyze high-dimensional data sets in numerous scientific domains, and are likely to become part of future machine learning pipelines. These early studies demonstrate its potential while also highlighting a number of challenges and opportunities for future research. The software is available for download at https://mhmethun.com/HYPPO-X/.","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122704969","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Dörflinger, Mark Albers, Benedikt Kleinbeck, Y. Guan, H. Michalik, Raphael Klink, Christopher Blochwitz, Anouar Nechi, Mladen Berekovic
{"title":"A comparative survey of open-source application-class RISC-V processor implementations","authors":"A. Dörflinger, Mark Albers, Benedikt Kleinbeck, Y. Guan, H. Michalik, Raphael Klink, Christopher Blochwitz, Anouar Nechi, Mladen Berekovic","doi":"10.1145/3457388.3458657","DOIUrl":"https://doi.org/10.1145/3457388.3458657","url":null,"abstract":"The numerous emerging implementations of RISC-V processors and frameworks underline the success of this Instruction Set Architecture (ISA) specification. The free and open source character of many implementations facilitates their adoption in academic and commercial projects. As yet it is not easy to say which implementation fits best for a system with given requirements such as processing performance or power consumption. With varying backgrounds and histories, the developed RISC-V processors are very different from each other. Comparisons are difficult, because results are reported for arbitrary technologies and configuration settings. Scaling factors are used to draw comparisons, but this gives only rough estimates. In order to give more substantiated results, this paper compares the most prominent open-source application-class RISC-V projects by running identical benchmarks on identical platforms with defined configuration settings. The Rocket, BOOM, CVA6, and SHAKTI C-Class implementations are evaluated for processing performance, area and resource utilization, power consumption as well as efficiency. Results are presented for the Xilinx Virtex UltraScale+ family and GlobalFoundries 22FDX ASIC technology.","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122633113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Quantum computing: a scalable, systems approach","authors":"A. Matsuura","doi":"10.1145/3457388.3460817","DOIUrl":"https://doi.org/10.1145/3457388.3460817","url":null,"abstract":"Quantum computing offers the potential for compelling performance improvement on important high performance computing applications such as the simulation of materials and chemical systems. In constructing a full-stack quantum computing system, there are many interdisciplinary research questions that cross the boundaries between physics, engineering and computer architecture. This talk will describe the promise and challenges of bringing quantum computing out of the lab and into a commercial full computer system and will give an overview of Intel's quantum computing research and system development.","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126516247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Tapeout of a RISC-V crypto chip with hardware trojans: a case-study on trojan design and pre-silicon detectability","authors":"A. Hepp, G. Sigl","doi":"10.1145/3457388.3458869","DOIUrl":"https://doi.org/10.1145/3457388.3458869","url":null,"abstract":"This paper presents design and integration of four hardware Trojans (HTs) into a post-quantum-crypto-enhanced RISC-V micro-controller, which was taped-out in September 2020. We cover multiple HTs ranging from a simple denial-of-service HT to a side-channel HT transmitting arbitrary information to external observers. For each HT, we give estimations of the detectability by the microcontroller-integration team using design tools or by simulation. We conclude that some HTs are easily detected by design-tool warnings. Other powerful HTs, modifying software control flow, cause little disturbance, but require covert executable code modifications. With this work, we strengthen awareness for HT risks and present a realistic testing device for HT detection tools.","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127105709","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Graph analytics in the exascale era","authors":"M. Halappanavar, Marco Minutoli, Sayan Ghosh","doi":"10.1145/3457388.3459984","DOIUrl":"https://doi.org/10.1145/3457388.3459984","url":null,"abstract":"Emergence of large-scale data sets has ushered in a new era of data-driven discovery in science and beyond that is enabled by advances in artificial intelligence techniques and high-performance computing. Graph analytics is a rapidly emerging area of research and application that enables several classes of applications. Generalization of graph algorithms in the form of combinatorial optimization has numerous applications in scientific computing and data-driven discovery. Despite widespread use, efficient parallel tools for graph analytics are hard to come by, especially when targeting the hybrid CPU-Graphics Processing Unit architectures at extreme scales. In this talk, we will present our ongoing work on distributed multi-GPU systems for two prototypical graph problems: graph clustering and influence maximization. We will demonstrate substantial gains in performance not only on PNNL systems but also on the current # 2 supercomputer, Summit. We will also present case studies from several scientific domains of importance to the DOE.","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133768176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A methodology and framework for software memoization of functions","authors":"Pedro Pinto, João MP Cardoso","doi":"10.1145/3457388.3458668","DOIUrl":"https://doi.org/10.1145/3457388.3458668","url":null,"abstract":"Enhancing performance is crucial when developing applications for high-performance and embedded computing. It requires sophisticated techniques and in-depth knowledge of the application domain and target architecture. Typically, developers prioritize the application's functional requirements over extra-functional requirements. Thus, a large part of the optimization effort is shifted to performance engineers, who rely on manual effort, alongside many analysis and optimization tools that need integration. This paper focuses on memoization, which caches results of pure computations and retrieves them if a function is called with repeating arguments. We propose a methodology for allowing developers and performance engineers to apply memoization straightforwardly by automating code analysis, code transformations, and memoization-specific profiling. It helps developers with no optimization expertise to quickly set up memoization and, simultaneously, it provides performance engineers with highly customizable analysis and memoization. We provide a concrete implementation supported by a DSL, a source-to-source compiler, and a memoization framework. We evaluate the methodology and framework with publicly available benchmarks. We show how one can analyze applications to select functions with performance improvement potential, which the experiments reveal might be challenging to find, and improve some applications with minimal effort.","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121754128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Rai, A. Sivasubramaniam, Adithya Kumar, Prasanna Venkatesh Rengasamy, N. Vijaykrishnan, Ameen Akel, S. Eilert
{"title":"Design space for scaling-in general purpose computing within the DDR DRAM hierarchy for map-reduce workloads","authors":"S. Rai, A. Sivasubramaniam, Adithya Kumar, Prasanna Venkatesh Rengasamy, N. Vijaykrishnan, Ameen Akel, S. Eilert","doi":"10.1145/3457388.3458661","DOIUrl":"https://doi.org/10.1145/3457388.3458661","url":null,"abstract":"This paper conducts a design space exploration of placing general purpose RISCV cores within the DDR DRAM hierarchy to boost the performance of important data analytics applications in the datacenter. We investigate the hardware (where? how many? how to interface?) and software (how to place data? how to map computations?) choices for placing these cores within the rank, chip, and bank of the DIMM slots to take advantage of the locality vs. parallelism trade-offs. We use the popular MapReduce paradigm, normally used to scale out workloads across servers, to scale in these workloads into the DDR DRAM hierarchy. We evaluate the design space using diverse off-the-shelf Apache Spark Workloads to show the pros-and-cons of different hardware placement and software mapping strategies. Results show that bank-level RISCV cores can provide tremendous speedup (up to 363X) for the offload-able parts of these applications, amounting to 14X speedup overall in some applications. Even in the non-amenable applications, we get at least 31% performance boost for the entire application. To realize this, we incur an area overhead of 4% at the bank level, and increase in temperature of < 4°C over the chip averaged over all applications.","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130078673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yassine Mekdad, Giuseppe Bernieri, M. Conti, A. E. Fergougui
{"title":"A threat model method for ICS malware: the TRISIS case","authors":"Yassine Mekdad, Giuseppe Bernieri, M. Conti, A. E. Fergougui","doi":"10.1145/3457388.3458868","DOIUrl":"https://doi.org/10.1145/3457388.3458868","url":null,"abstract":"Cyber-physical attacks against plants and Critical Infrastructures (CIs) are among the most significant concerns in the 21st century and can lead to devastating consequences. In particular, with the convergence between the Operational Technology (OT) network and the traditional IT network, malware threats for Industrial Control Systems (ICSs) are gradually increasing. In these scenarios, we need to identify potential cyber threats by developing innovative modeling techniques. However, existing malware-based cyber threats modeling techniques are not fully designed for industrial environment. In this paper, we present a threat modeling framework for Industrial Control Systems malware across two different levels: the Extraction Level and the Modeling Level. We evaluate the effectiveness of our model by analyzing the TRISIS cyber attack as a use case. A complex malware developed to cause operational disruption to industrial plants. Our solution outperforms existing malware threat modeling techniques for the ICS environment, and provides useful mitigation strategies to counter malicious activities.","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114522886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
I. Marsh, Nicolae Paladi, H. Abrahamsson, Jonas Gustafsson, J. Sjöberg, A. Johnsson, Pontus Sköldström, J. Dowling, P. Monti, Melina Vruna, Mohsen Amiribesheli
{"title":"Evolving 5G: ANIARA, an edge-cloud perspective","authors":"I. Marsh, Nicolae Paladi, H. Abrahamsson, Jonas Gustafsson, J. Sjöberg, A. Johnsson, Pontus Sköldström, J. Dowling, P. Monti, Melina Vruna, Mohsen Amiribesheli","doi":"10.1145/3457388.3458622","DOIUrl":"https://doi.org/10.1145/3457388.3458622","url":null,"abstract":"ANIARA (https://www.celticnext.eu/project-ai-net) attempts to enhance edge architectures for smart manufacturing and cities. AI automation, orchestrated lightweight containers, and efficient power usage are key components of this three-year project. Edge infrastructure, virtualization, and containerization in future telecom systems enable new and more demanding use cases for telecom operators and industrial verticals. Increased service flexibility adds complexity that must be addressed with novel management and orchestration systems. To address this, ANIARA will provide en-ablers and solutions for services in the domains of smart cities and manufacturing deployed and operated at the network edge(s).","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125939357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An efficient fault tolerant cloud market mechanism for profit maximization","authors":"Boyu Li, Guanquan Xu, Bin Wu, Yuhan Dong","doi":"10.1145/3457388.3458669","DOIUrl":"https://doi.org/10.1145/3457388.3458669","url":null,"abstract":"In support of effectively discovering the market value of resources and dynamic resource provisioning, auction design has recently been studied in the cloud. However, there are limitations due to the inability to accept time-varying user demands or offline settings. These limitations create a large gap between the real needs of users and the services available from cloud providers. In addition, existing auction mechanisms do not consider service interruption due to server failures caused by software or hardware problems. To address the limitations of existing auction mechanisms and to avoid service interruption, this paper targets a more general scenario of online cloud resource auction design where: 1) users can request multiple types of time-varying resources; and 2) at least one server is available for each accepted bid even when one or more servers fail; and 3) profit is maximized over the system execution span. Specifically, we model the profit maximization problem using an Integral Linear Programming (ILP) optimization framework, which offers an elastic model for time-varying user demands. In addition, we design an online, truthful, and time efficient auction mechanism consisting of a price-based allocation strategy and a pricing function. The online allocation strategy allocates multiple types of resource to each user while satisfying the time-varying demands and ensuring at least one server is available for each user in each allocated time slot. Lastly, the efficacy of online auctions is validated through careful theoretical analysis and trace-driven simulation studies.","PeriodicalId":136482,"journal":{"name":"Proceedings of the 18th ACM International Conference on Computing Frontiers","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133964572","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}