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2022 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)最新文献

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Work-in-Progress: Utilizing latency and accuracy predictors for efficient hardware-aware NAS 正在进行的工作:利用延迟和准确性预测器实现高效的硬件感知NAS
2022 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) Pub Date : 2022-10-01 DOI: 10.1109/CODES-ISSS55005.2022.00014
Negin Firouzian, S. H. Mozafari, J. Clark, W. Gross, B. Meyer
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引用次数: 0
Welcome Message from the CODES+ISSS 2022 Program Chairs CODES+ISSS 2022项目主席欢迎辞
2022 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) Pub Date : 2022-10-01 DOI: 10.1109/codes-isss55005.2022.00005
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引用次数: 0
Work-in-Progress: What to Expect of Early Training Statistics? An Investigation on Hardware-Aware Neural Architecture Search 正在进行的工作:对早期培训统计的期望是什么?基于硬件感知的神经结构搜索研究
2022 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) Pub Date : 2022-10-01 DOI: 10.1109/CODES-ISSS55005.2022.00007
Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Weichen Liu
{"title":"Work-in-Progress: What to Expect of Early Training Statistics? An Investigation on Hardware-Aware Neural Architecture Search","authors":"Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Weichen Liu","doi":"10.1109/CODES-ISSS55005.2022.00007","DOIUrl":"https://doi.org/10.1109/CODES-ISSS55005.2022.00007","url":null,"abstract":"Neural architecture search (NAS) is an emerging paradigm to automate the design of top-performing deep neural networks (DNNs). Specifically, the increasing success of NAS is attributed to the reliable performance estimation of different architectures. Despite significant progress to date, previous relevant methods suffer from prohibitive computational overheads. To avoid this, we propose an effective yet computationally efficient proxy, namely Trained Batchwise Estimation (TBE), to reliably estimate the performance of different architectures using the early batchwise training statistics. We then integrate TBE into the hardware-aware NAS scenario to search for hardware-efficient architecture solutions. Experimental results clearly show the superiority of TBE over previous relevant state-of-the-art approaches.","PeriodicalId":129167,"journal":{"name":"2022 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122380856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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