Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design最新文献_第8页

STINT: selective transmission for low-energy physiological monitoring 限时:选择性传输，用于低能生理监测

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design Pub Date : 2020-08-10 DOI: 10.1145/3370748.3406563

Tao-Yi Lee, Khuong Vo, Wongi Baek, M. Khine, N. Dutt

{"title":"STINT: selective transmission for low-energy physiological monitoring","authors":"Tao-Yi Lee, Khuong Vo, Wongi Baek, M. Khine, N. Dutt","doi":"10.1145/3370748.3406563","DOIUrl":"https://doi.org/10.1145/3370748.3406563","url":null,"abstract":"Noninvasive, and continuous physiological sensing enabled by novel wearable sensors is generating unprecedented diagnostic insights in many medical practices. However, the limited battery capacity of these wearable sensors poses a critical challenge in extending device lifetime in order to prevent omission of informative events. In this work, we exploit the inherent sparsity of physiological signals to intelligently enable selective transmission of these signals and thereby improve the energy efficiency of wearable sensors. We propose STINT, a selective transmission framework that generates a sparse representation of the raw signal based on domain-specific knowledge, and which can be integrated into a wide range of resource-constrained embedded sensing IoT platforms. STINT employs a neural network (NN) for selective transmission: the NN identifies, and transmits only the informative parts of the raw signal, thereby achieving low power operation. We validate STINT and establish its efficacy in the domain of IoT for energy-efficient physiological monitoring, by testing our framework on EcoBP - a novel miniaturized, and wireless continuous blood pressure sensor. Early experimental results on the EcoBP device demonstrate that the STINT-enabled EcoBP sensor outperforms the native platform by 14% of sensor energy consumption, with room for additional energy savings via complementary bluetooth and wireless optimizations.","PeriodicalId":116486,"journal":{"name":"Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126591344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Time-step interleaved weight reuse for LSTM neural network computing LSTM神经网络计算的时间步长交错权重用

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design Pub Date : 2020-08-10 DOI: 10.1145/3370748.3406561

Naebeom Park, Yulhwa Kim, Daehyun Ahn, Taesu Kim, Jae-Joon Kim

引用次数: 5

BrainWave: an energy-efficient EEG monitoring system - evaluation and trade-offs 脑波:一种高能效脑电图监测系统——评估与权衡

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design Pub Date : 2020-08-10 DOI: 10.1145/3370748.3406571

B. Bruin, K. Singh, J. Huisken, H. Corporaal

引用次数: 0

Deep-PowerX: a deep learning-based framework for low-power approximate logic synthesis deep - powerx:一个基于深度学习的框架，用于低功耗近似逻辑合成

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design Pub Date : 2020-07-03 DOI: 10.1145/3370748.3406555

G. Pasandi, Mackenzie Peterson, Moisés Herrera, Shahin Nazarian, M. Pedram

{"title":"Deep-PowerX: a deep learning-based framework for low-power approximate logic synthesis","authors":"G. Pasandi, Mackenzie Peterson, Moisés Herrera, Shahin Nazarian, M. Pedram","doi":"10.1145/3370748.3406555","DOIUrl":"https://doi.org/10.1145/3370748.3406555","url":null,"abstract":"This paper aims at integrating three powerful techniques namely Deep Learning, Approximate Computing, and Low Power Design into a strategy to optimize logic at the synthesis level. We utilize advances in deep learning to guide an approximate logic synthesis engine to minimize the dynamic power consumption of a given digital CMOS circuit, subject to a predetermined error rate at the primary outputs. Our framework, Deep-PowerX1, focuses on replacing or removing gates on a technology-mapped network and uses a Deep Neural Network (DNN) to predict error rates at primary outputs of the circuit when a specific part of the netlist is approximated. The primary goal of Deep-PowerX is to reduce the dynamic power whereas area reduction serves as a secondary objective. Using the said DNN, Deep-PowerX is able to reduce the exponential time complexity of standard approximate logic synthesis to linear time. Experiments are done on numerous open source benchmark circuits. Results show significant reduction in power and area by up to 1.47× and 1.43× compared to exact solutions and by up to 22% and 27% compared to state-of-the-art approximate logic synthesis tools while having orders of magnitudes lower run-time.","PeriodicalId":116486,"journal":{"name":"Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123977079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Low-power object counting with hierarchical neural networks 基于层次神经网络的低功耗目标计数

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design Pub Date : 2020-07-02 DOI: 10.1145/3370748.3406569

Abhinav Goel, Caleb Tung, Sarah Aghajanzadeh, Isha Ghodgaonkar, Shreya Ghosh, G. Thiruvathukal, Yung-Hsiang Lu

{"title":"Low-power object counting with hierarchical neural networks","authors":"Abhinav Goel, Caleb Tung, Sarah Aghajanzadeh, Isha Ghodgaonkar, Shreya Ghosh, G. Thiruvathukal, Yung-Hsiang Lu","doi":"10.1145/3370748.3406569","DOIUrl":"https://doi.org/10.1145/3370748.3406569","url":null,"abstract":"Deep Neural Networks (DNNs) achieve state-of-the-art accuracy in many computer vision tasks, such as object counting. Object counting takes two inputs: an image and an object query and reports the number of occurrences of the queried object. To achieve high accuracy, DNNs require billions of operations, making them difficult to deploy on resource-constrained, low-power devices. Prior work shows that a significant number of DNN operations are redundant and can be eliminated without affecting the accuracy. To reduce these redundancies, we propose a hierarchical DNN architecture for object counting. This architecture uses a Region Proposal Network (RPN) to propose regions-of-interest (RoIs) that may contain the queried objects. A hierarchical classifier then efficiently finds the RoIs that actually contain the queried objects. The hierarchy contains groups of visually similar object categories. Small DNNs at each node of the hierarchy classify between these groups. The RoIs are incrementally processed by the hierarchical classifier. If the object in an RoI is in the same group as the queried object, then the next DNN in the hierarchy processes the RoI further; otherwise, the RoI is discarded. By using a few small DNNs to process each image, this method reduces the memory requirement, inference time, energy consumption, and number of operations with negligible accuracy loss when compared with the existing techniques.","PeriodicalId":116486,"journal":{"name":"Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126957015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

HIPE-MAGIC: a technology-aware synthesis and mapping flow for highly parallel execution of memristor-aided LoGIC HIPE-MAGIC:一种技术感知的合成和映射流，用于高度并行执行忆阻器辅助逻辑

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design Pub Date : 2020-06-05 DOI: 10.1145/3370748.3406557

A. Fayyazi, Amirhossein Esmaili, M. Pedram

引用次数: 0

Resiliency analysis and improvement of variational quantum factoring in superconducting qubit 超导量子比特变分量子因子的弹性分析与改进

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design Pub Date : 2020-04-26 DOI: 10.1145/3370748.3406586

Ling Qiu, M. Alam, Abdullah Ash-Saki, Swaroop Ghosh

引用次数: 3

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design ACM/IEEE低功耗电子与设计国际研讨会论文集

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design Pub Date : 1900-01-01 DOI: 10.5555/3489049

引用次数: 1