2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)最新文献_第5页

Increasing Network Size and Training Throughput of FPGA Restricted Boltzmann Machines Using Dropout 利用Dropout提高FPGA受限玻尔兹曼机的网络规模和训练吞吐量

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.23

Jiang Su, David B. Thomas, P. Cheung

引用次数: 8

Communication Optimization for the 16-Core Epiphany Floating-Point Processor Array 16核epiphon浮点处理器阵列的通信优化

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.15

Nachiket Kapre, Siddhartha

引用次数: 0

Online Bandwidth Reduction Using Dynamic Partial Reconfiguration 使用动态部分重配置减少在线带宽

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.49

Seyyed Mahdi Najmabadi, Zhe Wang, Y. Baroud, S. Simon

引用次数: 3

Parallelism for High-Performance Tsunami Simulation with FPGA: Spatial or Temporal? 用FPGA实现高性能海啸模拟的并行性:空间还是时间?

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.19

Kohei Nagasu, K. Sano, Fumiya Kono, N. Nakasato, A. Vazhenin, S. Sedukhin

引用次数: 7

Improving Classification Accuracy of a Machine Learning Approach for FPGA Timing Closure 提高FPGA时序闭合机器学习方法的分类精度

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.28

Que Yanghua, Nachiket Kapre, Harnhua Ng, K. Teo

引用次数: 18

The SMEM Seeding Acceleration for DNA Sequence Alignment DNA序列比对的SMEM播种加速

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.21

Mau-Chung Frank Chang, Yu-Ting Chen, J. Cong, Po-Tsang Huang, Chun-Liang Kuo, Cody Hao Yu

{"title":"The SMEM Seeding Acceleration for DNA Sequence Alignment","authors":"Mau-Chung Frank Chang, Yu-Ting Chen, J. Cong, Po-Tsang Huang, Chun-Liang Kuo, Cody Hao Yu","doi":"10.1109/FCCM.2016.21","DOIUrl":"https://doi.org/10.1109/FCCM.2016.21","url":null,"abstract":"The advance of next-generation sequencing technology has dramatically reduced the cost of genome sequencing. However, processing and analyzing huge amounts of data collected from sequencers introduces significant computation challenges, these have become the bottleneck in many research and clinical applications. For such applications, read alignment is usually one of the most compute-intensive steps. Billions of reads generated from the sequencer need to be aligned to the long reference genome. Recent state-of-the-art software read aligners follow the seed-andextend model. In this paper we focus on accelerating the first seeding stage, which generates the seeds using the supermaximal exact match (SMEM) seeding algorithm. The two main challenges for accelerating this process are 1) how to process a huge number of short reads with high throughput, and 2) how to hide the frequent and long random memory access when we try to fetch the value of the reference genome. In this paper, we propose a scalable array-based architecture, which is composed by many processing engines (PEs) to process large amounts of data simultaneously for the demand of high throughput. Furthermore, we provide a tight software/hardware integration that realizes the proposed architecture on the Intel-Altera HARP system. With a 16-PE accelerator engine, we accelerate the SMEM algorithm by 4x, and the overall SMEM seeding stage by 26% when compared with 16-thread CPU execution. We further analyze the performance bottleneck of the design due to extensive DRAM accesses and discuss the possible improvements that are worthwhile to be explored in the future.","PeriodicalId":113498,"journal":{"name":"2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)","volume":"148 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121354963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 38

Initiation Interval Aware Resource Sharing for FPGA DSP Blocks FPGA DSP块的起始间隔感知资源共享

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.40

Bajaj Ronak, Suhaib A. Fahmy

引用次数: 1

Parallel Hardware Merge Sorter 并行硬件归并排序器

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.34

Wei Song, Dirk Koch, M. Luján, J. Garside

引用次数: 52

Heterogeneous Implementation of ECG Encryption and Identification on the Zynq SoC Zynq SoC上心电加密识别的异构实现

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.44

Amine Ait Si Ali, X. Zhai, A. Amira, F. Bensaali, N. Ramzan

引用次数: 2

Accelerating Apache Spark Big Data Analysis with FPGAs fpga加速Apache Spark大数据分析

2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2016-05-01 DOI: 10.1109/FCCM.2016.33

Ehsan Ghasemi, P. Chow

{"title":"Accelerating Apache Spark Big Data Analysis with FPGAs","authors":"Ehsan Ghasemi, P. Chow","doi":"10.1109/FCCM.2016.33","DOIUrl":"https://doi.org/10.1109/FCCM.2016.33","url":null,"abstract":"Summary form only given. Apache Spark has become one of the most popular engines for big data processing. Spark provides a platform-independent, high-abstraction programming paradigm for large-scale data processing by leveraging the Java frame-work. Though it provides software portability across various machines, Java also limits the performance of distributed environments, such as Spark. While it may be unrealistic to rewrite platforms like Spark in a faster language, a more viable approach to mitigate its poor performance is to accelerate the computations while still working within the Java-based framework. This work demonstrates the feasibility of incorporating FPGA acceleration into Spark, and uses a MapReduce implementation of the k-means clustering algorithm to show that acceleration is possible even when using a hardware platform that is not well-optimized for performance. An important feature of our approach is that the use of FPGAs is completely transparent to the user through the use of library functions, which is a common way by which users access functions provided by Spark. Power users can further develop other computations using high-level synthesis.","PeriodicalId":113498,"journal":{"name":"2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124729316","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4