16核epiphon浮点处理器阵列的通信优化

Nachiket Kapre, Siddhartha
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引用次数: 0

摘要

在基于noc(片上网络)的定制计算平台(如parallelella (Zynq 7010 + Epiphany-III SoC)中管理和优化通信对于浮点大容量同步工作负载的性能和能效至关重要。在本文中,我们探讨了epiphani - iii SoC在通信密集型工作负载中的机会和功能。使用我们的通信支持库,我们能够将单精度BSP工作负载(如Matrix Market数据集上的稀疏矩阵向量乘法(SpMV))加速高达6.5倍,将BerkStan SNAP数据集上的PageRank算法加速高达8倍,同时将功耗降低2倍。与优化的OpenMP x86映射相比,我们观察到Epiphany SoC的能效(GFLOP/s/W)提高了约10倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Communication Optimization for the 16-Core Epiphany Floating-Point Processor Array
The management and optimization of communication in an NoC-based (network-on-chip) bespoke computing platform such as the Parallella (Zynq 7010 + Epiphany-III SoC) is critical for performance and energy-efficiency of floating-point bulk-synchronous workloads. In this paper, we explore the opportunities and capabilities of the Epiphany-III SoC for communication-intensive workloads. Using our communication support library for the Epiphany, we are able to accelerate single-precision BSP workloads like the Sparse Matrix-Vector multiplication (SpMV) on Matrix Market datasets by up to 6.5× and PageRank algorithm on the BerkStan SNAP dataset by up to 8×, while lowering power usage by 2× over optimized ARM-based implementations. When compared to optimized OpenMP x86 mappings, we observe a ≈10× improvement in energy efficiency (GFLOP/s/W) with Epiphany SoC.
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