2016 International Conference on Advances in Computing, Communication, & Automation (ICACCA) (Spring)最新文献_第6页

Integral error based controller design & performance analysis for a TOPDT process 基于积分误差的TOPDT过程控制器设计与性能分析

2016 International Conference on Advances in Computing, Communication, & Automation (ICACCA) (Spring) Pub Date : 2016-04-01 DOI: 10.1109/ICACCA.2016.7578887

Alka Patel, P. Juneja, M. Chaturvedi, Sagar Rawat

引用次数: 2

Realisation of DVCC based operational amplifier and its bandpass filter application 基于DVCC运算放大器的实现及其带通滤波器的应用

2016 International Conference on Advances in Computing, Communication, & Automation (ICACCA) (Spring) Pub Date : 2016-04-01 DOI: 10.1109/ICACCA.2016.7578891

Anuj Upadhyay, K. Pal

引用次数: 2

Scantime antivirus evasion and malware deployment using silent-SFX 扫描时间防病毒逃避和恶意软件部署使用silent-SFX

2016 International Conference on Advances in Computing, Communication, & Automation (ICACCA) (Spring) Pub Date : 2016-04-01 DOI: 10.1109/ICACCA.2016.7578894

S. Bhushan, Pramod Kumar, Amit Kumar, Vibhor Sharma

引用次数: 1

TCAD simulation of germanium source dopingless tunnel FET 无锗源掺杂隧道场效应管的TCAD仿真

2016 International Conference on Advances in Computing, Communication, & Automation (ICACCA) (Spring) Pub Date : 2016-04-01 DOI: 10.1109/ICACCA.2016.7578868

R. Juyal, S. S. Chauhan

引用次数: 17

Generation of display characters on flat cathode ray tubes for avionics precision displays 航空电子精密显示器用平面阴极射线管显示字符的生成

2016 International Conference on Advances in Computing, Communication, & Automation (ICACCA) (Spring) Pub Date : 2016-04-01 DOI: 10.1109/ICACCA.2016.7578871

Pooja Raj Verma, V. Karar

{"title":"Generation of display characters on flat cathode ray tubes for avionics precision displays","authors":"Pooja Raj Verma, V. Karar","doi":"10.1109/ICACCA.2016.7578871","DOIUrl":"https://doi.org/10.1109/ICACCA.2016.7578871","url":null,"abstract":"In this work, a method has been proposed to generate alphanumeric characters and symbols using FPGA so that the so generated horizontal and vertical deflection signals could be used to activate the CRT for the display of image for HUD application. VERILOG development tools have been used for the generation of various display patterns. Development and simulation of digital data bus corresponding to the X and Y display patterns have been carried out and the digital data is stored, buffered and fed as input to 16 bit digital to analog converter.With assumption of total field of view of HUD as 30 degree circular and HUD origin lying at the lower left corner and with voltage range along x and y axis is -10V to +10V, 16-bit DAC is used to generate 1024 different voltage combinations and the chosen x-y space is divided into 1024 pixel point both in horizontal and vertical directions. A total time to display single character or symbology information is calculated by counting the total data points. The time may increase or decrease depending upon the number of data points used in the lookup table. Therefore, to generate a single character or a sequence of characters or page information, each character or symbology has been calculated and simulated in terms of height, width, shape and orientation of each character.","PeriodicalId":109549,"journal":{"name":"2016 International Conference on Advances in Computing, Communication, & Automation (ICACCA) (Spring)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117229578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0