TENCON 2010 - 2010 IEEE Region 10 Conference最新文献

A four-way-polling QoS scheduler for IEEE 802.11e HCCA 用于IEEE 802.11e HCCA的四路轮询QoS调度器

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686547

Jeng-Ji Huang, Yeh-Horng Chen, D. Shiung

引用次数: 10

Study of SVC traffic multicast over WiMAX network WiMAX网络上SVC流量组播的研究

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686536

I-Hsuan Peng, Yen-Wen Chen, Chia-Han Lee, Chang-Wu Chen

{"title":"Study of SVC traffic multicast over WiMAX network","authors":"I-Hsuan Peng, Yen-Wen Chen, Chia-Han Lee, Chang-Wu Chen","doi":"10.1109/TENCON.2010.5686536","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686536","url":null,"abstract":"This paper studies the resource allocation algorithm for multicasting scalable video coding (SVC) source in WiMax network. In order to effectively utilize the radio resources, the proposed scheme considers the channel condition of each mobile station for the establishment of multicast groups. We considers that a service multicast group, which receive the same service traffic simultaneously, can be divided into several delivery multicast groups in WiMAX network for better radio resource utilization. And the delivery multicast group is designed as a “soft-group” that can be flexibly arranged. The proposed algorithm divides the allocation procedure into two parts in a heuristic way to reduce the computing complexity. The delivery multicast group allocation part applies the willingness to pay and throughput comparison concepts to arrange the subchannel for users. The SVC resource allocation part utilizes the divide and conquer approach to reduce the radio resource consumption. The simulation results show that the proposed scheme can minimize the resource usage according to each receiver's channel condition for better transmission efficiency and can provide fair video quality as well.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115993822","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A case study of evaluation technique for soft error tolerance on SRAM-based FPGAs 基于sram的fpga软容错性评估技术的实例研究

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686023

Tsuyoshi Kimura, N. Kai, M. Amagasaki, M. Kuga, T. Sueyoshi

引用次数: 1

Stochastic nature of current-excited magnetic domain and domain wall dynamics microscopically investigated by Lorentz microscopy 用洛伦兹显微镜研究了电流激发磁畴和畴壁动力学的随机性质

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5685851

Y. Togawa, T. Kimura, K. Harada, A. Tonomura, Y. Otani

引用次数: 0

Numerical study on inductive detection of magnetostatic spin wave packet 静磁自旋波包感应探测的数值研究

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686411

Y. Nakashima, K. Nagai, Terumitsu Tanaka, K. Matsuyama, Y. Nozaki

引用次数: 0

Cartesian resizing of image and video for data compression 用于数据压缩的图像和视频的笛卡尔调整大小

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686771

Tao Wang, K. Urahama

引用次数: 5

Grain filtering in MILC and its impact on performance of n- and p-channel TFTs MILC中的颗粒滤波及其对n通道和p通道tft性能的影响

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686540

S. Nagata, G. Nakagawa, T. Asano

引用次数: 2

Change of EEG activity by repetitive Transcranial Magnetic Stimulation 反复经颅磁刺激对脑电活动的影响

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686653

K. Nojima, Y. Katayama, K. Iramina

引用次数: 1

A less configuration memory reconfigurable logic device with error detect and correct circuit 一种具有错误检测和纠错电路的少组态存储器可重构逻辑器件

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686014

Qian Zhao, Y. Ichinomiya, Yasuhiro Okamoto, M. Amagasaki, M. Iida, T. Sueyoshi

{"title":"A less configuration memory reconfigurable logic device with error detect and correct circuit","authors":"Qian Zhao, Y. Ichinomiya, Yasuhiro Okamoto, M. Amagasaki, M. Iida, T. Sueyoshi","doi":"10.1109/TENCON.2010.5686014","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686014","url":null,"abstract":"The field-programmable gate arrays (FPGAs) are widely used in varies fields in recent years. However, because of large amounts of configuration memories in FPGAs are used to implement logic and routing, the single event upset (SEU) problem makes them not feasible for applications that need high reliability. Moreover, as the threshold voltage becomes lower with the development of silicon process technology, the configuration memories are becoming more sensitive to SEU. Therefore, FPGAs require new technology to improve its dependability. In this research, we first develop a new Hamming code based error detect and correct (EDC) circuit that can prevent the configuration memory of a reconfigurable device from SEU. We then propose a novel reconfigurable logic element, namely COGRE, which will use much less configuration memory than the conventional FPGA 4-, 5- or 6-LUTs (lookup tables). Evaluation revealed that compared to the 6-LUT FPGAs with triple modular redundancy (TMR) configuration memory blocks, the 5- and 6-input COGRE with the novel error detect and correct circuit save about 75.44 and 74.29% memories on average, respectively. And the dependability of the proposed architectures is about 6.8 to 10 times better than the LUTs with a tile level TMR structure on average. Moreover, with the consideration of the on the fly scrubbing advantage of the EDC, SEUs cannot be accumulated, so a much higher dependability can be achieved.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"46 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120905197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Validation of stepwise refinement with test cases generated from formal specification 使用从正式规范生成的测试用例逐步细化的验证

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5685923

Shinya Yamada, A. Keijiro, S. Kusakabe, Y. Omori

{"title":"Validation of stepwise refinement with test cases generated from formal specification","authors":"Shinya Yamada, A. Keijiro, S. Kusakabe, Y. Omori","doi":"10.1109/TENCON.2010.5685923","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5685923","url":null,"abstract":"In software development, there is a problem that development cost increases by back track when bugs which are included in the phase of requirement definition are found in the after phases. As an effective method to solve the problem, we have a method with a formal specification language for requirement. A formal specification language can describe the functional requirement exactly with mathematical in and verifies the specification with tools. In formal method, we change the specification in a formal specification to executable program with stepwise refinement. At stepwise refinement step, we find bugs by proof of the specification. Herewith, we can get the program of the high level reliability. But, it is expensive to develop with proof. There is a method to verify specification with test cases generated by manpower. But, there are possibilities of including bugs in specification because of generating by manpower. We propose the method to validate stepwise refinement with lightweight method. We generate test cases from formal specification in VDM-SL before refinement, and test the specification after refinement. With this validation method, it is possible to validate of refinement focused state transition model. We implemented test case generator tool whose test case is executed with VDMUnit and VDMTools. We can confirm the availability of the validation of refinement with test case generator tool we implemented.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121204848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1