TENCON 2010 - 2010 IEEE Region 10 Conference最新文献_第2页

A less configuration memory reconfigurable logic device with error detect and correct circuit 一种具有错误检测和纠错电路的少组态存储器可重构逻辑器件

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686014

Qian Zhao, Y. Ichinomiya, Yasuhiro Okamoto, M. Amagasaki, M. Iida, T. Sueyoshi

{"title":"A less configuration memory reconfigurable logic device with error detect and correct circuit","authors":"Qian Zhao, Y. Ichinomiya, Yasuhiro Okamoto, M. Amagasaki, M. Iida, T. Sueyoshi","doi":"10.1109/TENCON.2010.5686014","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686014","url":null,"abstract":"The field-programmable gate arrays (FPGAs) are widely used in varies fields in recent years. However, because of large amounts of configuration memories in FPGAs are used to implement logic and routing, the single event upset (SEU) problem makes them not feasible for applications that need high reliability. Moreover, as the threshold voltage becomes lower with the development of silicon process technology, the configuration memories are becoming more sensitive to SEU. Therefore, FPGAs require new technology to improve its dependability. In this research, we first develop a new Hamming code based error detect and correct (EDC) circuit that can prevent the configuration memory of a reconfigurable device from SEU. We then propose a novel reconfigurable logic element, namely COGRE, which will use much less configuration memory than the conventional FPGA 4-, 5- or 6-LUTs (lookup tables). Evaluation revealed that compared to the 6-LUT FPGAs with triple modular redundancy (TMR) configuration memory blocks, the 5- and 6-input COGRE with the novel error detect and correct circuit save about 75.44 and 74.29% memories on average, respectively. And the dependability of the proposed architectures is about 6.8 to 10 times better than the LUTs with a tile level TMR structure on average. Moreover, with the consideration of the on the fly scrubbing advantage of the EDC, SEUs cannot be accumulated, so a much higher dependability can be achieved.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"46 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120905197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Mgnetoresistance in ballistic Ni nanocontact at 4.2K 4.2K时弹道镍纳米接触的磁电阻

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686404

K. Ienaga, N. Nakashima, Y. Inagaki, T. Kawae, H. Tsujii

引用次数: 0

Fabrication of n-type β-FeSi2/p-type Si heterojunctions by pulsed laser deposition and their application to NIR photodiodes 脉冲激光沉积制备n型β-FeSi2/p型Si异质结及其在近红外光电二极管中的应用

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686670

Chen Li, Wataru Yokoyama, S. Izumi, Promros Nathaporn, T. Yoshitake

引用次数: 0

Low noise-low power digital phase-locked loop 低噪声低功耗数字锁相环

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5685954

M. Saber, Yutaka Jitsumatsu, Muhammad Talal Ali Khan

引用次数: 1

Tunable waveguide dye laser on a plastic optical fiber 塑料光纤上的可调谐波导染料激光器

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686691

S. Omi, Hiroyuki Kubota, Y. Yang, Hirofumi Watanabe, Y. Oki

引用次数: 0

Control of nanosize ferromagnetic electrodes by magnetostriction 纳米铁磁电极的磁致伸缩控制

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686402

K. Ienaga, N. Nakashima, Y. Inagaki, T. Kawae, H. Tsujii

引用次数: 0

Malfunction suppression of semiconductor circuit breaker in high voltage DC power supply system 高压直流供电系统中半导体断路器的故障抑制

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5685956

S. Abe, T. Ninomiya, Sihun Yang, M. Ogawa, M. Shoyama, A. Matsumoto, A. Fukui, M. Yamasaki

引用次数: 0

A power-gatable reconfigurable logic chip with FeRAM cells 具有FeRAM单元的功率门控可重构逻辑芯片

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686019

Masahiro Koga, M. Iida, M. Amagasaki, Yoshinobu Ichida, Mitsuro Saji, J. Iida, T. Sueyoshi

{"title":"A power-gatable reconfigurable logic chip with FeRAM cells","authors":"Masahiro Koga, M. Iida, M. Amagasaki, Yoshinobu Ichida, Mitsuro Saji, J. Iida, T. Sueyoshi","doi":"10.1109/TENCON.2010.5686019","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686019","url":null,"abstract":"An advantage of a RLD (Reconfigurable logic device) such as an FPGA (Field programmable gate array) is that it can be customized after being manufactured. However, there is a problem related to standby power when using SRAM as a configuration memory. Power gating, which is one of the power reduction techniques, is difficult to use in SRAM-based RLDs because of the high overhead — data hibernation and reconfiguration time — and SRAM being volatile. In this paper, we describe a chip that we developed — a reconfigurable logic chip based on FeRAM (Ferroelectric random access memory) technology. The chip employs island-style routing architecture and uses a variable grain logic cell as a logic block. A NV-FF (Non-Volatile FlipFlop), which contains FeRAM, a FF, and power-gating control circuits, is used as configuration memory. The NV-FF can transmit data between FeRAM and FF automatically when power to the chip is turned off/on. Thus, chip-level power gating is possible. The hibernate/restore time is less than I ms. The chip has 18 × 18 logic blocks and an area of 54.76 mm2. We also make test circuits for testing the chip after fabrication. Target fault model is Stack-at faults model. When we merge all 28 circuits, fault coverage is 78 %.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130529202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A self-recovery technique for highly-available stream processing over local area networks 一种用于局域网高可用流处理的自恢复技术

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5685904

Fuyuan Xiao, Kyoko Nagano, T. Itokawa, T. Kitasuka, M. Aritsugi

{"title":"A self-recovery technique for highly-available stream processing over local area networks","authors":"Fuyuan Xiao, Kyoko Nagano, T. Itokawa, T. Kitasuka, M. Aritsugi","doi":"10.1109/TENCON.2010.5685904","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5685904","url":null,"abstract":"We present a replication-based and self-recovery-based approach, replica backup, that realizes both continuous and highly-available data stream processing over local area networks. In our approach, we use process-pairs mechanism in which peer operators run in parallel and independently so that each downstream operator can use whichever data arrives first. To further realize continuously stable communication among operators and improve the robustness of system, we devise automatical recovery mechanism that overcomes the limitation of one-off recovery mechanism. In this paper, we first outline the basic design and framework associating with our self-recovery technique. Next, we develop central leader election algorithm (CLEA) that can choose a new operator according with the placement of candidates. This operator placement algorithm that directly measures the latency among operators aims to balance the cost of data stream processing and latency guarantee. Finally, we compare our replica backup method with previous high-available technique through experiments on network simulator ns-3 to demonstrate the utility of our work.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126992852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Face detection in color images based on skin color models 基于肤色模型的彩色图像人脸检测

TENCON 2010 - 2010 IEEE Region 10 Conference Pub Date : 2010-12-01 DOI: 10.1109/TENCON.2010.5686631

Li Zou, S. Kamata

引用次数: 15