IEEE Journal of Emerging and Selected Topics in Industrial Electronics最新文献

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Modified Bounded Real Lemma for Structured Robust Control of Fifth-Order DC–DC Converter 五阶DC-DC变换器结构鲁棒控制的修正有界实引理
IF 4.9
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-04-01 Epub Date: 2025-12-23 DOI: 10.1109/JESTIE.2025.3647209
Akankshi Trivedi;Mummadi Veerachary
{"title":"Modified Bounded Real Lemma for Structured Robust Control of Fifth-Order DC–DC Converter","authors":"Akankshi Trivedi;Mummadi Veerachary","doi":"10.1109/JESTIE.2025.3647209","DOIUrl":"https://doi.org/10.1109/JESTIE.2025.3647209","url":null,"abstract":"The reported charge-pump-based double-input dc–dc converter topology is buck type, but its range of bucking is restricted. With an aim to evolve buck type of double-input topology with a wider bucking range, a fifth-order MIMO converter is evolved in this article. A novel approach is developed to design the structured robust proportional-integral-derivative controller for this fifth-order MIMO dc–dc converter system. The proposed controller design methodology is based on solving the nonlinear bounded real lemma wherein the matrix inequality involved is bilinear in nature and inherently nonconvex, thereby precluding the guarantee of solution existence. To alleviate associated nonlinearity, an augmented matrix is formulated, which includes the system dynamics and augmented states representing the impact of disturbance or uncertainties in the system. It also extends the feasible set of linear matrix inequality as the augmented states introduce an additional degree of freedom and hence the controller will be less conservative. The inclusion of additional auxiliary terms ((<italic>B<sub>cl,d</sub></i>)<italic><sup>T</sup>B<sub>cl,d</sub></i><sub>,</sub> <italic>P<sup>2</sup>​</i>) leads to a reduced value of gamma, signifying enhanced disturbance rejection capability and improved stability margins. To demonstrate the efficacy of the proposed approach, an extensive comparative analysis is conducted across critical performance metrics, including robust stability, gain and phase margins, and structured singular value. The controller synthesized is experimentally validated using a 150 W prototype setup, thereby affirming the practical efficacy and robustness of the developed control design framework.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 2","pages":"604-617"},"PeriodicalIF":4.9,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148513616","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modified-Modular Multilevel Converter With DC Boosting Capability and Capacitor Ripple Voltage Optimization by Regulating Arm-Currents 具有直流升压能力和调节臂电流优化电容纹波电压的改进型模块化多电平变换器
IF 4.9
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-04-01 Epub Date: 2026-01-26 DOI: 10.1109/JESTIE.2026.3657789
Rahul Mishra;Vivek Agarwal
{"title":"Modified-Modular Multilevel Converter With DC Boosting Capability and Capacitor Ripple Voltage Optimization by Regulating Arm-Currents","authors":"Rahul Mishra;Vivek Agarwal","doi":"10.1109/JESTIE.2026.3657789","DOIUrl":"https://doi.org/10.1109/JESTIE.2026.3657789","url":null,"abstract":"This article proposes a modified-MMC configuration that works in conjunction with a novel switching function (SF) to enable DC side voltage boosting feature. Unlike in conventional-MMC, a new variable, i.e., DC side-voltage boosting factor (DCS-VBF) is incorporated in the SF, which enables independent injection of DC and AC voltage in the arm voltage. This capability allows DC side voltage boosting without underutilizing the MMC components (switches and capacitors), thereby reducing voltage boosting transformer requirements and submodule (SM), i.e., switches and capacitor count. Furthermore, the SM-capacitor voltage ripple (SM-CVR) analyses are carried out. A multiple objectives problem is formulated considering SM-CVR analyses to achieve maximum peak SM-CVR suppression with minimum circulating currents (CCs) and zero sequence voltages injection. The Pareto optimality and particle swarm optimization together are utilized to obtain the Pareto fronts for optimal CCs/ZVS combinations. Based on these analyses, a range of DCS-VBF is suggested. The proposed peak CVR suppression scheme is capable of reducing the CVR upto 30%. The analysis also shows that upto 16% SM reduction is possible. Representative simulation and experimental results are presented to validate the claims.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 2","pages":"629-640"},"PeriodicalIF":4.9,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148509545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Improved Linear Active Disturbance Rejection Control With FCS-MPC for Three Phase Three-Level Vienna Rectifier 改进的FCS-MPC三相三电平维也纳整流器线性自抗扰控制
IF 4.9
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-04-01 Epub Date: 2025-12-23 DOI: 10.1109/JESTIE.2025.3647450
Tawfique Uzzaman;Tyrone Fernando;Herbert HoChing Iu;Xinan Zhang
{"title":"An Improved Linear Active Disturbance Rejection Control With FCS-MPC for Three Phase Three-Level Vienna Rectifier","authors":"Tawfique Uzzaman;Tyrone Fernando;Herbert HoChing Iu;Xinan Zhang","doi":"10.1109/JESTIE.2025.3647450","DOIUrl":"https://doi.org/10.1109/JESTIE.2025.3647450","url":null,"abstract":"The Vienna rectifier has been extensively utilized in industry owing to its cost-effectiveness. However, it contends with the significant issue of current distortion. To resolve these issues and enhance the static and dynamic output voltage performance of the Vienna rectifier, this article proposes a control strategy that combines the finite control set model predictive control (FCS-MPC) in the inner current loop with the improved linear active-disturbance rejection control (LADRC) in the outer voltage loop. First, a recursive least square-based improved LADRC is employed in the outer loop to determine the reference values for the inner current loop. Subsequently, the Vienna rectifier is meticulously modeled to derive the predicted input currents for the FCS-MPC-based inner loop. Then, three adjacent voltage vectors that give three lowest cost function values in each sector are selected to synthesize the optimal voltage vector, and the duty cycle of the corresponding vector is computed based on its cost function. To demonstrate the efficacy of the proposed control method, simulations and experiments are conducted using a Vienna rectifier prototype. Comparisons with traditional methods prove that the proposed controller demonstrates superior steady-state and dynamic performances.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 2","pages":"591-603"},"PeriodicalIF":4.9,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148511864","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Informed Modulation Strategy for Stability Enhancement of DAB Converters Connected to a DC Railway Grid 一种提高直流铁路电网DAB变换器稳定性的知情调制策略
IF 4.9
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-04-01 Epub Date: 2026-02-16 DOI: 10.1109/JESTIE.2026.3665345
Martin Scohier;Miguel López Gajardo;Olivier Deblecker;Tomislav Dragičević;Bashir Bakhshideh Zad
{"title":"An Informed Modulation Strategy for Stability Enhancement of DAB Converters Connected to a DC Railway Grid","authors":"Martin Scohier;Miguel López Gajardo;Olivier Deblecker;Tomislav Dragičević;Bashir Bakhshideh Zad","doi":"10.1109/JESTIE.2026.3665345","DOIUrl":"https://doi.org/10.1109/JESTIE.2026.3665345","url":null,"abstract":"Modern Isolated Bidirectional DC–DC (IBDC) converters in DC railway face large variations in terms of supply conditions. Thanks to its extensive modulation capabilities, the Dual Active Bridge (DAB) converter offers a promising solution for improving onboard resource efficiency. While various Modulation Schemes (MSs) have been developed to minimize power losses, their influence on cascaded system stability remains insufficiently addressed in the literature. This article introduces a novel method for informed MS design, leveraging small-signal stability analysis and closed-loop input impedance modeling that fully accounts for both the MSs and controller parameters. The analysis also examines the dependence of a benchmark Active Damping (AD) strategy on the selected MS. For the first time, it is demonstrated that an uninformed application of Triple Phase Shift modulation can result in instability, even with an AD strategy. Based on the proposed approach, a simple yet effective MS is designed to maximize the stability margin across the full range of supply voltages. The methodology is validated experimentally on a 1 kW, 50 kHz DAB converter, confirming its effectiveness and practical relevance for IBDC applications involving DC voltage variations.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 2","pages":"641-652"},"PeriodicalIF":4.9,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148513278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Industrial Electronics Society Information IEEE工业电子学会信息
IF 4
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-01-09 DOI: 10.1109/JESTIE.2025.3645533
{"title":"IEEE Industrial Electronics Society Information","authors":"","doi":"10.1109/JESTIE.2025.3645533","DOIUrl":"https://doi.org/10.1109/JESTIE.2025.3645533","url":null,"abstract":"","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 1","pages":"C4-C4"},"PeriodicalIF":4.0,"publicationDate":"2026-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11344827","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145929640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Officers and Vice Presidents of Co-Sponsoring Societies Information 联合赞助协会的官员和副总裁信息
IF 4
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-01-09 DOI: 10.1109/JESTIE.2025.3645531
{"title":"Officers and Vice Presidents of Co-Sponsoring Societies Information","authors":"","doi":"10.1109/JESTIE.2025.3645531","DOIUrl":"https://doi.org/10.1109/JESTIE.2025.3645531","url":null,"abstract":"","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 1","pages":"C3-C3"},"PeriodicalIF":4.0,"publicationDate":"2026-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11344826","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145929617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modeling and Design of the Tesla Transformer With an Extremely High Turns Ratio 超高匝比特斯拉变压器的建模与设计
IF 4.9
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-01-01 Epub Date: 2025-10-15 DOI: 10.1109/JESTIE.2025.3621834
Sichao Wang;Chen Qi;Xincheng Xu;Xiyou Chen;Peng Wang
{"title":"Modeling and Design of the Tesla Transformer With an Extremely High Turns Ratio","authors":"Sichao Wang;Chen Qi;Xincheng Xu;Xiyou Chen;Peng Wang","doi":"10.1109/JESTIE.2025.3621834","DOIUrl":"https://doi.org/10.1109/JESTIE.2025.3621834","url":null,"abstract":"For Tesla transformers with an extremely high turns ratio, it is challenging to predict the electrical characteristics according to its physical structure and in turn to design the physical structure for meeting its target electrical characteristics. In this article, an accurate quarter-wavelength segmented mutual inductance model of Tesla transformer is proposed, which has an intuitive circuit topology and comprehensive parameters with clear physical significance, all of which can be accurately calculated analytically. By combining the proposed model with GA-BP neural network, an effective model-driven design method is proposed, which can be used to design Tesla transformers to meet its target electrical characteristics over a wide frequency range without the need for simulation or experiment, thus offering high timeliness and versatility. Finally, the effectiveness of the proposed circuit model and design method is verified experimentally.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 1","pages":"24-35"},"PeriodicalIF":4.9,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148504455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Virtual DC Link-Based Isolated Two-Stage Topology With Solar Power Tracking Capability 具有太阳能跟踪能力的虚拟直流链路隔离两级拓扑
IF 4.9
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-01-01 Epub Date: 2025-11-05 DOI: 10.1109/JESTIE.2025.3629629
Prakash Ji Barnawal;Vivek Nandan Lal;Rajeev Kumar Singh
{"title":"A Virtual DC Link-Based Isolated Two-Stage Topology With Solar Power Tracking Capability","authors":"Prakash Ji Barnawal;Vivek Nandan Lal;Rajeev Kumar Singh","doi":"10.1109/JESTIE.2025.3629629","DOIUrl":"https://doi.org/10.1109/JESTIE.2025.3629629","url":null,"abstract":"This article proposes a virtual dc link-based two-stage topology with global maxima power tracking capability under partial shading conditions (PSCs). In solar photovoltaics (PV) integrated two-stage topologies, the use of vulnerable electrolytic capacitors and traditional power tracking algorithms for PSCs can significantly degrade their performance. To address these challenges, a virtual dc link-based isolated two-stage topology is proposed where the infused film capacitors of the power converter stage-1 act like a dc link for the power converter stage-2, creating a virtual dc link for the topology and concurrently eliminating the need for bulky and unreliable electrolytic capacitor. Moreover, the proposed topology is incorporated with a trained and heuristic particle swarm optimization algorithm to harness the solar power at global maxima for multipeak curves under PSCs. Using a complex ac-based fundamental harmonics approximation technique and soft-switching realization, resonant tank components are optimized, and zero voltage switching is achieved for a full load operation. A 500 W scaled-down prototype is developed to verify the operation under steady-state and partially shaded conditions formed using a PV simulator. The global maxima power is tracked within 0.5–0.6 s with a high tracking efficiency and harmonic distortion of 1.74% in inverter line voltage.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 1","pages":"149-160"},"PeriodicalIF":4.9,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148508110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Harmonic Minimization in a Reduced Switch Count 17-Level Switched Capacitor Multilevel Inverter Using Hybrid Ant Colony Optimization Technique 基于混合蚁群优化技术的17电平开关电容多电平逆变器谐波最小化
IF 4.9
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-01-01 Epub Date: 2025-09-16 DOI: 10.1109/JESTIE.2025.3610395
Arya Singh;Vivek Nandan Lal;Ranjit Mahanty
{"title":"Harmonic Minimization in a Reduced Switch Count 17-Level Switched Capacitor Multilevel Inverter Using Hybrid Ant Colony Optimization Technique","authors":"Arya Singh;Vivek Nandan Lal;Ranjit Mahanty","doi":"10.1109/JESTIE.2025.3610395","DOIUrl":"https://doi.org/10.1109/JESTIE.2025.3610395","url":null,"abstract":"This article presents a 17-level high-gain switched capacitor multilevel inverter (HG-SCMLI) topology that achieves multiple voltage levels with significantly reduced component count while utilizing a single DC source. The primary innovation lies in the topology’s unique configuration, which uses only 16 components to generate a 17-level output voltage with a voltage gain of 8, resulting in a low total component-to-gain ratio. The proposed HG-SCMLI addresses two critical challenges in conventional designs: excessive component count and high input inrush currents. The topology features inherent self-balancing of capacitor voltages without additional sensors, reducing control complexity. To demonstrate the topology’s capability for high-quality power conversion, selective harmonic elimination pulsewidth modulation governed by a hybrid ant colony optimization algorithm is implemented. An 850-W laboratory prototype with 94.50% efficiency and a peak efficiency of 95.60% at 185 W has been developed and tested under various loading conditions and modulation indices, validating the topology’s practical performance.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 1","pages":"177-188"},"PeriodicalIF":4.9,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148510157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficient High-Frequency Isolated Buck-Boost Matrix Converters With Reduced Components and Continuous Input Current 高效高频隔离降压-升压矩阵变换器与减少元件和连续输入电流
IF 4.9
IEEE Journal of Emerging and Selected Topics in Industrial Electronics Pub Date : 2026-01-01 Epub Date: 2025-11-11 DOI: 10.1109/JESTIE.2025.3631662
Alireza Lahooti Eshkevari;Hafiz Furqan Ahmed;Iman Abdoli;Mostafa Karimi Hajiabadi
{"title":"Efficient High-Frequency Isolated Buck-Boost Matrix Converters With Reduced Components and Continuous Input Current","authors":"Alireza Lahooti Eshkevari;Hafiz Furqan Ahmed;Iman Abdoli;Mostafa Karimi Hajiabadi","doi":"10.1109/JESTIE.2025.3631662","DOIUrl":"https://doi.org/10.1109/JESTIE.2025.3631662","url":null,"abstract":"This article develops two circuit variations of a new single-phase high-frequency transformer-isolated buck-boost matrix converter (MC). Both MCs feature continuous input current, with one topology providing continuous output current and another reducing component count further. These MCs offer symmetric bipolar voltage gain, supporting both inverting and noninverting output voltages, as well as an output voltage with step-change frequency and rectification. The adjustable bipolar buck-boost output of the converter, step-variable frequency operation, and voltage rectification capability make it suitable for high-gain traction systems, rectification, and use in dynamic voltage restorer applications. Key advantages include substantial component reduction, low total harmonic distortion in both input and output currents, enhanced magnetic utilization, and the ability to operate with various winding ratios without compromising the buck-boost function or its voltage range. In addition, integrating an HFT in both topologies eliminates the need for line-frequency transformers, enabling more efficient grid integration. Both MCs also benefit from inherent commutation. The comparative evaluations confirm that the proposed MCs perform better than existing designs in terms of maximum switch voltage, switch utilization factor, efficiency, and volumetric performance. The article presents the operating principle of the proposed MCs, followed by experiments to verify their operation and performance.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"7 1","pages":"228-238"},"PeriodicalIF":4.9,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148510158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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