2024 Pan Pacific Strategic Electronics Symposium (Pan Pacific)最新文献

{"title":"Physics-Informed Machine Learning for Solder Design and Reliability Prediction for Electronics","authors":"Jia Liu, Qais Qasaimeh","doi":"10.23919/PanPacific60013.2024.10436514","DOIUrl":"https://doi.org/10.23919/PanPacific60013.2024.10436514","url":null,"abstract":"We propose a physics-informed machine learning framework for solder materials design and reliability prediction for electronics. It includes a comprehensive set of factors that impact solder reliability and can work as a solder-agnostic framework for solder design and reliability prediction. This framework is built on a deep modular artificial neural network (ANN), with its structure imitating the relationships among elements and processes in electronics manufacturing, and its ANN modules model the elements and processes in electronic product manufacturing. It includes physics understandings of solder materials and their performance and provides a suitable machine learning framework with interpretability in understanding the solder design and reliability in electronics. A preliminary case study showed the superiority of the proposed framework in reliability prediction accuracy and interpretability.","PeriodicalId":518290,"journal":{"name":"2024 Pan Pacific Strategic Electronics Symposium (Pan Pacific)","volume":"16 4","pages":"1-7"},"PeriodicalIF":0.0,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140530011","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The Comparison of the Reliability Performance of Different Top Metal Materials in MEMS Applications","authors":"V. Hein, Kirsten Weide-Zaage, André Clausner","doi":"10.23919/PanPacific60013.2024.10436520","DOIUrl":"https://doi.org/10.23919/PanPacific60013.2024.10436520","url":null,"abstract":"The combination of analog/mixed-signal, high-voltage and embedded non-volatile memory options with sensor and actuator integration is still common in automotive, industrial, communication and medical applications. MEMS with or without integrated CMOS, 3D integration micro transfer printing and integrated microfluid systems are in use to realize such applications. The established top metal interconnect materials for analog/mixed-signal CMOS applications are thick Aluminum (AlCu with Titan and Titanium Nitride) and thick Copper. Integrated noble metal electrodes are necessary for MEMS applications like microfluidics. The reliability requirements of a CMOS/ MEMS process differs from a long storage shelf life at room temperature, long life time for medical (in-body) or space applications up to high operating conditions for automotive and industrial applications like oil drilling. Applications, like functional surfaces, combine integrated circuits for example for next generation DNA sequencing. The noble metals for electrodes on top are thinner for such applications. An additional reliability challenge for such a lab on a chip is corrosion. Automotive applications have often mission profiles which need high currents, high temperature and a growing mechanical stability. The reliability of noble top metals is more and more under investigation because MEMS are more common in automotive products. The knowledge about reliability especially about mechanical properties is an interesting topic in addition to the results from standard tests like electro migration and stress migration tests because of the advanced mechanical stress in the applications and the danger of corrosion. The comparison of the electromigration performance and mechanical stability of AlCu, Copper, Gold and Platinum as thick and/ or top metal tracks is necessary to evaluate and assess the suitability of the materials for the different applications. The possibilities to generate test results for thick and or noble metals are limited because of the necessary long test times for thick metals and materials like Gold or Platinum. The interaction of different failure mechanisms and the different material and stack combinations of the CMOS part make an assessment difficult. Simulations can support the choice of materials by values for mechanical stress and stress divergences as well as they can deliver basic knowledge about the main failure mechanisms. Only a smaller number of varying interconnect stacks will be realized in a development of a new process. The basic knowledge from simulation results will help to decide about the type of reliability test and test effort for the process qualification.","PeriodicalId":518290,"journal":{"name":"2024 Pan Pacific Strategic Electronics Symposium (Pan Pacific)","volume":"43 3","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140529927","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The Challenge of Lower Temperature Soldering for Large Ball-Grid Array Board-Level Assembly Process","authors":"HongWen Zhang, Tyler Richmond, Huaguang Wang, Francis Mutuku","doi":"10.23919/panpacific60013.2024.10436526","DOIUrl":"https://doi.org/10.23919/panpacific60013.2024.10436526","url":null,"abstract":"Lower temperature soldering has been considered as one of the effective ways to reduce the risk of warpage on PCB assembly. Use of lower-temperature solders, including a BiSnAgCu eutectic and two In-containing, Bi-free solders DFLT (Durafuse® LT), and DFLT-2 has been attempted to reflow the 40mmx40mm plastic ball grid array (PBGA928). BiSnAg, under the combinations of reflow profiles P185 and P200 (~185°C and ~200°C peak temperature) and the paste-to-ball (P2B) volume ratio (0.13, 0.25, and 0.5), always formed defective joints. Under the P200 profile with P2B volume ratio of 0.5, SAC305/BiSnAg joints were dominated exclusively by hot-tearing and shrinkage voids despite forming the desired drum shape. Using P220 profile (~220°C peak temperature, right above the liquidus temperature of SAC305) with P2B ratio of 0.13, SAC/BiSnAg had presented the drum shape joint and free of hot-tearing and shrinkage voids. With the constant P2B volume ratio of 0.13, P200 also renders various malformed joints for both DFLT and DFLT-2. The major challenge will be the insufficient molten solder volume under low temperature soldering to accommodate the displacement caused by the warpage. Increasing reflow temperature improved the joint shape and greatly reduced the defects for both DFLT and DFLT-2. Under P220, both SAC/DFLT and SAC/DFLT-2 joints achieved the desired short-and-fat drum shape, comparable to those reflowed under P240. The formation of the optimal joint for all three pastes under the hot profiles is attributed to the sufficient liquid solder volume since both paste and SAC ball fully melt and merge, which compensates the displacement caused by the dynamic warpage. Both SAC/DFLT and SAC/DFLT-2 joints exhibited the limited hot-tearing under the P200 profile while SAC/BiSnAg joints were dominated by those defects. The different metallurgy of DFLT and DFLT -2 did not result in an enlarged pasty range after joining with SAC305 and thus led to the lower defect rate. Investigation of the joint reliability performance is still ongoing.","PeriodicalId":518290,"journal":{"name":"2024 Pan Pacific Strategic Electronics Symposium (Pan Pacific)","volume":"5 3","pages":"1-8"},"PeriodicalIF":0.0,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140529789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Industry 4.0 Technology Adoption Issues for Small- and Medium-Sized Manufacturers and the Role of AI to Improve Adoption Rates","authors":"Gregory A. Harris, Ashley C. Yarbrough","doi":"10.23919/PanPacific60013.2024.10436513","DOIUrl":"https://doi.org/10.23919/PanPacific60013.2024.10436513","url":null,"abstract":"Original Equipment Manufacturers and large first-tier manufacturing companies have realized the need to utilize digitalization to compete in the global economy. These companies have the resources, funding, and engineering talent to evaluate and implement Industry 4.0, or Smart Manufacturing, capabilities to improve competitiveness and profitability. This is not the case for 90% of the supply chain comprising small- and medium-sized manufacturers (SMMs). In this paper, we explore the inhibitors to technology adoption and present the role of artificial intelligence (AI) in improving adoption rates in the industrial base. The paper closes with a look at how technologies such as AI will affect the future of electronics manufacturing.","PeriodicalId":518290,"journal":{"name":"2024 Pan Pacific Strategic Electronics Symposium (Pan Pacific)","volume":"55 44","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140529890","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Artificial Intelligence-Based Methods for Assessment of Accrued Damage and Remaining Use-Life in Automotive Underhood Electronics","authors":"Pradeep Lall, Tony Thomas, Vishal Mehta","doi":"10.23919/PanPacific60013.2024.10436521","DOIUrl":"https://doi.org/10.23919/PanPacific60013.2024.10436521","url":null,"abstract":"To ensure the smooth and uninterrupted operation of electronic systems over their lifespan, it is essential to assess progressive damage accrual and remaining useful life in operation. This paper proposes Prognostics Health Management methods that utilize feature vector-based assessment to detect damage initiation and progression in such systems. The presented method can effectively detect realtime impending failures in mission-critical electronics and assess mission readiness before deployment or during operation. Previous research in this field has mainly relied on fuses and canaries for failure detection, but this paper presents a method that assesses evolving damage in complex systems with nonlinear material behavior. Identification of meaningful state-vectors for correlation with damage progression, feature-vector engineering is pursued. The study identifies feature vectors for various mechanical shock and vibration levels that predict remaining useful life, even for different solder interconnect materials. The selected feature vector is modeled using the Long Short-term Memory (LSTM) deep learning technique to predict the remaining useful life during drops. The study validates the feature vectors' accuracy by correlating LSTM's prediction of plastic work with that predicted by finite element simulation and experimentally measured time to failure.","PeriodicalId":518290,"journal":{"name":"2024 Pan Pacific Strategic Electronics Symposium (Pan Pacific)","volume":"61 42","pages":"1-12"},"PeriodicalIF":0.0,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140529756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Elevating Excellence in High-Reliability Electronics: The Personal and Lasting Legacy of Clean PCBs","authors":"Justin Cody Worden","doi":"10.23919/panpacific60013.2024.10436442","DOIUrl":"https://doi.org/10.23919/panpacific60013.2024.10436442","url":null,"abstract":"In the realm of printed circuit board (PCB) production, the adage “Business is personal, and our legacy lives through the products we produce” resonates deeply. Each PCB we manufacture reflects not only our commitment to quality and reliability but also the lasting legacy we create in the ever-evolving world of electronics. This paper delves into the profound significance of clean PCBs, emphasizing that the path to excellence in high-reliability electronics begins with meticulous post-reflow cleaning. The essence of “Business Is Personal” extends beyond monetary transactions and corporate profits. It encapsulates the dedication and responsibility we have as manufacturers to deliver products that stand the test of time. High-reliability electronics, including those used in aerospace, medical devices, and automotive systems, require an exceptional level of quality assurance to ensure safety, performance, and longevity. Clean PCBs are at the heart of this assurance.","PeriodicalId":518290,"journal":{"name":"2024 Pan Pacific Strategic Electronics Symposium (Pan Pacific)","volume":"66 35","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140529743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Glass and Glass/LTCC Interposers as Heterogenous Integration Platform","authors":"Jens Müller, Mahsa Kaltwasser, H. Bartsch, Arne Behrens, Thomas Handte, Julian Wüster, Stefan Sinzinger","doi":"10.23919/PanPacific60013.2024.10436523","DOIUrl":"https://doi.org/10.23919/PanPacific60013.2024.10436523","url":null,"abstract":"Glass as substrate or interposer material is gaining more and more interest due to its thin film compatibility and thus high-density integration capability. Multilayer stacks for processor packaging applications can be achieved by laminating Ajinomoto build-up film (ABF) on glass substrates. Some glasses exhibit very frequency stable dielectric properties and low losses which makes glass substrates also favorable for microwave applications. Moreover, in contrast to silicon as interposer material, glass materials are cheaper, they can be processed in large panel format, they do not require deposition of insulating dielectric layers and they are available with different temperature coefficients of expansion (TCE). The latter was the pre-requisite to combine glasses with TCE-matching Low Temperature Cofired Ceramic (LTCC) materials to achieve an inorganic compound substrate offering both multilayer and thin-film capability in one substrate. In addition, the glass side of the interposer might be used for integrating photonic elements and components for mixed electronic/photonic applications. Green LTCC tapes are processed in the standard sequence up to the lamination step. In parallel, holes for vias are laser drilled in the glass and filled with thick-film conductor paste. The LTCC stack is then laminated onto the glass substrate and the laminate is fired according to sintering conditions of the LTCC. During firing, the sintered LTCC establishes a strong bond to the glass without the need of an extra bonding layer. This multilayer Tape-on-Substrate approach results in zero lateral shrinkage of the LTCC and therefore high lateral dimensional accuracy. After cleaning, the glass side can be used for semi-additive or additive conductor structuring. Thick-film printing on glass as well as printing of metal-organic pastes as basis for electroplating are demonstrated. This paper summarizes the achieved results on process development and interposer substrate evaluation comprising assembly technologies and high-frequency properties. Key words: Glass-Interposer, LTCC-substrate, Thick- and thin film deposition, photonic components","PeriodicalId":518290,"journal":{"name":"2024 Pan Pacific Strategic Electronics Symposium (Pan Pacific)","volume":"21 7","pages":"1-7"},"PeriodicalIF":0.0,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140529631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Implementation of the Product Reliability Program","authors":"John Cooper","doi":"10.23919/panpacific60013.2024.10436446","DOIUrl":"https://doi.org/10.23919/panpacific60013.2024.10436446","url":null,"abstract":"The product reliability program was initiated to verify that the product being rushed into production is ready. That it has been through a process of analysis, testing and documentation aimed at assuring the success of the product meeting company's goals for reliability: that it will perform its functions successfully for a long time with high confidence, at a reasonable cost of ownership, and in an acceptable time to market. What is reliability, and why is it important? It differs from product quality, in that the quality program is aimed at building the best product that meets design, while reliability aims to see that the product quality is met throughout the life of the product (or some period of time). Reliability is defined as the probability that a product will operate for some period of time, under stated conditions and with a given level of confidence. Why is reliability important? If we are lacking in quality or reliability, we will have unacceptable DOAs (Dead On Arrivals) or product returns, which directly impact the bottom line (profits). Time to Market for a new design in a new market is of utmost importance, but if the products don't work, the reputation of the product and the company will suffer; consequences of this may far outweigh other financial or time to market achievements. Market pressures are forcing companies to produce products with higher reliability. How do we implement a reliability program ? This will depend upon the company organizational make-up, the level of experience of the employee's in reliability, and the market demands for reliability. It would of course help to have employees experienced in reliability, but if the company lacks such skill sets, outside consultants can be brought in to give some guidance. But these consultants need to be immersed into the company's product development process and tasked with the documentation of the reliability process and training for engineers and managers. Why is there resistance to a reliability program ? The company culture is probably built on a history of product development cycles, possibly from years previous when market demands for reliability were not nearly so demanding. Also, many of the tools in reliability are built on statistics and require some skills in understanding. Reliability tools also involve testing products at stress levels beyond the product specification, and the design engineers may find this difficult to accept. In this paper, we will examine reliability engineering tools and the reliability process, and how to introduce them to a company. We will look at what elements are needed in order to create a corporate culture that supports the reliability program implementation. We will discuss some strategies on how to generate support for this reliability program. We will discuss an example in which the product is highly customized, and sold in low volume. Each product sold is based on specific requirements from the customer, and is designed to fit i","PeriodicalId":518290,"journal":{"name":"2024 Pan Pacific Strategic Electronics Symposium (Pan Pacific)","volume":"33 3","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140530004","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}