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THE CONTROL SYSTEM OF THE AEgIS EXPERIMENT AT CERN 欧洲核子研究中心宙斯盾实验控制系统
4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-18 DOI: 10.15199/13.2023.8.18
Georgy Kornakov
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引用次数: 0
ELECTRONIC CONTROL SYSTEM FOR THE QUANTUM COMPUTER INFRASTRUCTURE IN THE MIKOK PROJECT 米谷项目量子计算机基础设施的电子控制系统
4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-18 DOI: 10.15199/13.2023.8.14
Grzegorz Kasprowicz
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引用次数: 0
SAYMA – AN ARBITRARY WAVEFORM GENERATOR FOR SCIENTIFIC EXPERIMENTS IN ION TRAPS Sayma -一个任意波形发生器的科学实验在离子阱
4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-18 DOI: 10.15199/13.2023.8.12
Paweł Kulik
{"title":"SAYMA – AN ARBITRARY WAVEFORM GENERATOR FOR SCIENTIFIC EXPERIMENTS IN ION TRAPS","authors":"Paweł Kulik","doi":"10.15199/13.2023.8.12","DOIUrl":"https://doi.org/10.15199/13.2023.8.12","url":null,"abstract":"","PeriodicalId":51031,"journal":{"name":"Elektronika Ir Elektrotechnika","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135208673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
LASER BEAM STABILIZATION SYSTEM USING OPEN-SOURCE TOOLS 激光束稳定系统使用开源工具
4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-18 DOI: 10.15199/13.2023.8.11
Grzegorz Kasprowicz
{"title":"LASER BEAM STABILIZATION SYSTEM USING OPEN-SOURCE TOOLS","authors":"Grzegorz Kasprowicz","doi":"10.15199/13.2023.8.11","DOIUrl":"https://doi.org/10.15199/13.2023.8.11","url":null,"abstract":"","PeriodicalId":51031,"journal":{"name":"Elektronika Ir Elektrotechnika","volume":"2011 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135208674","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
HIGH VOLTAGE SYSTEM FOR ION TRAPS AND GEM DETECTORS IN THE SINARA OPEN HARDWARE ECOSYSTEM sinara开放硬件生态系统中离子阱和宝石探测器的高压系统
4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-18 DOI: 10.15199/13.2023.8.9
Tomasz Przywózki
{"title":"HIGH VOLTAGE SYSTEM FOR ION TRAPS AND GEM DETECTORS IN THE SINARA OPEN HARDWARE ECOSYSTEM","authors":"Tomasz Przywózki","doi":"10.15199/13.2023.8.9","DOIUrl":"https://doi.org/10.15199/13.2023.8.9","url":null,"abstract":"","PeriodicalId":51031,"journal":{"name":"Elektronika Ir Elektrotechnika","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135208677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
APPLICATION OF ARTIQ CONTROL SYSTEM IN MODULAR COSMIC RAY DETECTOR – MCORD artiq控制系统在模块化宇宙射线探测器McOrd中的应用
4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-18 DOI: 10.15199/13.2023.8.19
Mikołaj Sowiński
{"title":"APPLICATION OF ARTIQ CONTROL SYSTEM IN MODULAR COSMIC RAY DETECTOR – MCORD","authors":"Mikołaj Sowiński","doi":"10.15199/13.2023.8.19","DOIUrl":"https://doi.org/10.15199/13.2023.8.19","url":null,"abstract":"","PeriodicalId":51031,"journal":{"name":"Elektronika Ir Elektrotechnika","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135208503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
FRONTIER SCIENCE IN A QUANTUM EXPERIMENT: AEgIS AT CERN 量子实验的前沿科学:欧洲核子研究中心的宙斯盾
4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-18 DOI: 10.15199/13.2023.8.6
Georgy Kornakov
{"title":"FRONTIER SCIENCE IN A QUANTUM EXPERIMENT: AEgIS AT CERN","authors":"Georgy Kornakov","doi":"10.15199/13.2023.8.6","DOIUrl":"https://doi.org/10.15199/13.2023.8.6","url":null,"abstract":"","PeriodicalId":51031,"journal":{"name":"Elektronika Ir Elektrotechnika","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135208679","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
DESIGN OF A CRYOGENIC INTEGRATED CIRCUIT FOR NEXT-GENERATION QUANTUM COMPUTERS 下一代量子计算机低温集成电路的设计
4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-18 DOI: 10.15199/13.2023.8.13
Grzegorz Kasprowicz
{"title":"DESIGN OF A CRYOGENIC INTEGRATED CIRCUIT FOR NEXT-GENERATION QUANTUM COMPUTERS","authors":"Grzegorz Kasprowicz","doi":"10.15199/13.2023.8.13","DOIUrl":"https://doi.org/10.15199/13.2023.8.13","url":null,"abstract":"","PeriodicalId":51031,"journal":{"name":"Elektronika Ir Elektrotechnika","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135208670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Novel Lossless Positive-/Negative-Grounded Capacitance Multipliers Using VCII 采用VCII的新型无损正/负接地电容乘法器
IF 1.3 4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-07 DOI: 10.5755/j02.eie.34304
Mohammad Faseehuddin, Sadia Shireen, S. M. Md Ali, W. Tangsrirat
{"title":"Novel Lossless Positive-/Negative-Grounded Capacitance Multipliers Using VCII","authors":"Mohammad Faseehuddin, Sadia Shireen, S. M. Md Ali, W. Tangsrirat","doi":"10.5755/j02.eie.34304","DOIUrl":"https://doi.org/10.5755/j02.eie.34304","url":null,"abstract":"In the presented research, the second-generation voltage conveyor (VCII) is used in the design of active capacitance multipliers. In this paper, three positive and one negative lossless grounded capacitance multipliers (GCMs) are designed. All of these GCMs are designed using two VCIIs, one capacitor, and two resistors. There is no need for any passive component matching to implement a GCM. The multiplication factor of GCMs can be set/varied by changing the values of two resistances as per requirement. Considering nonideal constraints, GCMs are analysed mathematically to evaluate the effect of nonideal current and voltage transfer gains on the performance of the proposed GCMs. Also, parasitic analysis is conducted to study the effect of VCII node impedance on the performance of the presented GCMs. The simulation analysis is performed using Cadence Virtuoso in 0.18 µm Silterra Malaysia process design kit (PDK). Additionally, the macro-model of commercially available integrated circuit, AD844, is used to design the proposed GCM-2 to further prove the theoretical findings.","PeriodicalId":51031,"journal":{"name":"Elektronika Ir Elektrotechnika","volume":" ","pages":""},"PeriodicalIF":1.3,"publicationDate":"2023-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44196789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of Convolutional Neural Networks Architecture for Non-Profiled Side-Channel Attack Detection 用于非轮廓侧信道攻击检测的卷积神经网络结构设计
IF 1.3 4区 工程技术
Elektronika Ir Elektrotechnika Pub Date : 2023-09-07 DOI: 10.5755/j02.eie.33995
A. A. Ahmed, M Zahid Hasan, S. Islam, A. Aman, Nurhizam Safie
{"title":"Design of Convolutional Neural Networks Architecture for Non-Profiled Side-Channel Attack Detection","authors":"A. A. Ahmed, M Zahid Hasan, S. Islam, A. Aman, Nurhizam Safie","doi":"10.5755/j02.eie.33995","DOIUrl":"https://doi.org/10.5755/j02.eie.33995","url":null,"abstract":"Deep learning (DL) is a new option that has just been made available for side-channel analysis. DL approaches for profiled side-channel attacks (SCA) have dominated research till now. In this attack, the attacker has complete control over the profiling device and can collect many traces for a range of critical parameters to characterise device leakage before the attack. In this study, we apply DL algorithms to non-profiled data. An attacker can only retrieve a limited number of side-channel traces from a closed device with an unknown key value in non-profiled mode. The authors conducted this research. Key estimations and deep learning measurements can reveal the secret key. We prove that this is doable. This technology is excellent for non-profits. DL and neural networks can benefit these organisations. Neural networks can provide a new technique to verify the safety of hardware cryptographic algorithms. It was recently suggested. This study creates a non-profiled SCA utilising convolutional neural networks (CNNs) on an AVR microcontroller with 8 bits of memory and the AES-128 cryptographic algorithm. We used aligned power traces with several samples to demonstrate how challenging CNN-based SCA is in practise. This will help us reach our goals. Here is another technique to create a solid CNN data set. In particular, CNN-based SCA experiment data and noise effects are examined. These experiments employ power traces with Gaussian noise. The CNN-based SCA works well with our data set for non-profiled attacks. Gaussian noise on power traces causes many more issues. These results show that our method can recover more bytes successfully from SCA compared to other methods in correlation power analysis (CPA) and DL-SCA without regularisation.","PeriodicalId":51031,"journal":{"name":"Elektronika Ir Elektrotechnika","volume":" ","pages":""},"PeriodicalIF":1.3,"publicationDate":"2023-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44651506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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