Circuit World最新文献

{"title":"An internally-controlled memristor-based amplitude shift keying modulator","authors":"C. Maxwell, Dongsheng Yu, Yang Leng","doi":"10.1108/CW-06-2020-0104","DOIUrl":"https://doi.org/10.1108/CW-06-2020-0104","url":null,"abstract":"\u0000Purpose\u0000The purpose of this paper is to design and construct an amplitude shift keying (ASK) modulator, which, using the digital binary modulating signal, controls a floating memristor emulator (MR) internally without the need for additional control circuits to achieve the ASK modulated wave.\u0000\u0000\u0000Design/methodology/approach\u0000A binary digital unipolar signal to be modulated is converted by a pre-processor circuit into a suitable bipolar modulating direct current (DC) signal for the control of the MR state, using current conveyors the carrier signal’s amplitude is varied with the change in the memristance of the floating MR. A high pass filter is then used to remove the DC control signal (modulating signal) leaving only the modulated carrier signal.\u0000\u0000\u0000Findings\u0000The results from the experiment and simulation are in agreement showed that the MR can be switched between two states and that a change in the carrier signals amplitude can be achieved by using an MR. Thus, showing that the circuit behavior is in line with the proposed theory and validating the said theory.\u0000\u0000\u0000Originality/value\u0000In this paper, the binary signal to be modulated is modified into a suitable control signal for the MR, thus the MR relies on the internal operation of the modulator circuit for the control of its memristance. An ASK modulation can then be achieved using a floating memristor without the need for additional circuits or signals to control its memristance.\u0000","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49357075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hardware-efficient approximate multiplier architectures for media processing applications","authors":"Anil Kumar Uppugunduru, Syed Ershad Ahmed","doi":"10.1108/CW-07-2020-0147","DOIUrl":"https://doi.org/10.1108/CW-07-2020-0147","url":null,"abstract":"\u0000Purpose\u0000Multipliers that form the basic building blocks in most of the error-resilient media processing applications are computationally intensive and power-hungry modules. Therefore, improving the multiplier’s performance in terms of area, critical path delay and power has become an important research area. This paper aims to propose two improved multiplier designs based on a new approximate compressor circuit to reduce the hardware complexity at the partial product reduction stage. The proposed approximate 4:2 compressor design significantly reduces the overall hardware cost of the multiplier. The error introduced by the approximate compressor is reduced using a new technique of assigning inputs to the compressors in the partial product reduction structure.\u0000\u0000\u0000Design/methodology/approach\u0000The multiplier designs implemented using the proposed approximate 4:2 compressor are targeted for error-resilient applications. For fair comparisons, various multiplier designs, including the proposed one, are implemented in MATLAB. The quality analysis is carried out using standard images, and metrics such as structural similarity index are computed to quantify the result of proposed designs with the existing architectures. Next, Verilog gate-level designs are synthesized to compute area, delay and power to prove the efficacy of the proposed designs.\u0000\u0000\u0000Findings\u0000Exhaustive error and hardware analysis have been carried out for the existing and proposed multiplier architectures. Error analysis carried out using MATLAB proves that the proposed designs achieve better quality metrics than existing designs. Hardware results show that area, the power consumed and critical path delay are reduced up to 39.8%, 51.7% and 15.9%, respectively, compared to the existing designs. Toward the end, the proposed designs impact is quantified and compared with existing designs on real-time image sharpening and image multiplication applications.\u0000\u0000\u0000Originality/value\u0000The area, delay and power metrics of the multiplier can be improved using an approximate compressor in an error-resilient application. Accordingly, in this work, a new compressor is proposed that reduces the hardware complexity in the multiplier architecture. However, the proposed approximate compressor, while reducing the computational complexity, tends to introduce error in the multiplier. The error introduced by the approximate compressor is reduced using a new technique of assigning inputs to the compressors in the partial product reduction structure. With the help of the approximate compressor and a technique of input realignment, hardware efficient and highly accurate multiplier designs are achieved.\u0000","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44825770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Multiple-input multiple-output antenna for dual-band applications with a novel radiating patch and enhanced feeding network","authors":"Y. Zehforoosh, P. Alemi","doi":"10.1108/CW-07-2020-0156","DOIUrl":"https://doi.org/10.1108/CW-07-2020-0156","url":null,"abstract":"\u0000Purpose\u0000An Elephant trunk shape (ETS) radiating element is used to achieve the two covering bands of multi-input multi-output (MIMO) antenna. These frequency bands can be controlled by the length of a slot embedded in ETS. The slot length in ETS plays a defining role in controlling the impedance bandwidth (IBW) of the MIMO antenna, and its diligent adjustment of it leads to cover the frequency range of Bluetooth and Wireless Local Area Network systems.\u0000\u0000\u0000Design/methodology/approach\u0000A new MIMO antenna is introduced in this paper in conjunction with an enhanced Wilkinson power divider feeding platform.\u0000\u0000\u0000Findings\u0000These frequency bands can be controlled by the length of a slot embedded in ETS. The slot length in ETS plays a defining role in controlling the IBW of the MIMO antenna, and its diligent adjustment leads to covering the frequency range of Bluetooth and WLAN systems.\u0000\u0000\u0000Originality/value\u0000The proposed MIMO antenna benefits from good isolation between ports for both frequency bands. The proposed MIMO antenna is constructed on FR4 substrate with a volume of 90 × 134 × 1.6 mm3.\u0000","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46877055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Analysis of circuit performance of Ge-Si hetero structure TFET based on analytical model","authors":"Sudipta Ghosh, P. Venkateswaran, S. Sarkar","doi":"10.1108/CW-08-2020-0175","DOIUrl":"https://doi.org/10.1108/CW-08-2020-0175","url":null,"abstract":"\u0000Purpose\u0000High packaging density in the present VLSI era builds an acute power crisis, which limits the use of MOSFET device as a constituent block in CMOS technology. This leads researchers in looking for alternative devices, which can replace the MOSFET in CMOS VLSI logic design. In a quest for alternative devices, tunnel field effect transistor emerged as a potential alternative in recent times. The purpose of this study is to enhance the performances of the proposed device structure and make it compatible with circuit implementation. Finally, the performances of that circuit are compared with CMOS circuit and a comparative study is made to find the superiority of the proposed circuit with respect to conventional CMOS circuit.\u0000\u0000\u0000Design/methodology/approach\u0000Silicon–germanium heterostructure is currently one of the most promising architectures for semiconductor devices such as tunnel field effect transistor. Analytical modeling is computed and programmed with MATLAB software. Two-dimensional device simulation is performed by using Silvaco TCAD (ATLAS). The modeled results are validated through the ATLAS simulation data. Therefore, an inverter circuit is implemented with the proposed device. The circuit is simulated with the Tanner EDA tool to evaluate its performances.\u0000\u0000\u0000Findings\u0000The proposed optimized device geometry delivers exceptionally low OFF current (order of 10^−18 A/um), fairly high ON current (5x10^−5 A/um) and a steep subthreshold slope (20 mV/decade) followed by excellent ON–OFF current ratio (order of 10^13) compared to the similar kind of heterostructures. With a very low threshold voltage, even lesser than 0.1 V, the proposed device emerged as a good replacement of MOSFET in CMOS-like digital circuits. Hence, the device is implemented to construct a resistive inverter to study the circuit performances. The resistive inverter circuit is compared with a resistive CMOS inverter circuit. Both the circuit performances are analyzed and compared in terms of power dissipation, propagation delay and power-delay product. The outcomes of the experiments prove that the performance matrices of heterojunction Tunnel FET (HTFET)-based inverter are way ahead of that of CMOS-based inverter.\u0000\u0000\u0000Originality/value\u0000Germanium–silicon HTFET with stack gate oxide is analytically modeled and optimized in terms of performance matrices. The device performances are appreciable in comparison with the device structures published in contemporary literature. CMOS-like resistive inverter circuit, implemented with this proposed device, performs well and outruns the circuit performances of the conventional CMOS circuit at 45-nm technological node.\u0000","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45389924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 23.3 dBm CMOS power amplifier with third-order gm cancellation linearization technique achieving OIP3 of 34 dBm","authors":"S. Mariappan, J. Rajendran, N. Noh, Y. Yusof, Narendra Kumar","doi":"10.1108/CW-08-2020-0209","DOIUrl":"https://doi.org/10.1108/CW-08-2020-0209","url":null,"abstract":"\u0000Purpose\u0000The purpose of this paper is to implement a highly linear 180 nm complementary metal oxide semiconductor (CMOS) power amplifier (PA) to meet the stringent linearity requirement of an long term evolution (LTE) signal with minimum trade-off to power added efficiency (PAE).\u0000\u0000\u0000Design/methodology/approach\u0000The CMOS PA is designed in a cascaded dual-stage configuration comprises a driver amplifier and a main PA. The gate voltage (VGS) of the driver amplifier is tuned to optimize its positive third-order transconductance (gm3) to be canceled with the main PA’s fixed negative gm3. The gm3 cancellation between these stages mitigates the third-order intermodulation product (IMD3) that contributes to enhanced linearity.\u0000\u0000\u0000Findings\u0000For driver’s VGS of 0.82 V with continuous wave signal, the proposed PA achieved a power gain of 14.5 dB with a peak PAE of 31.8% and a saturated output power of 23.3 dBm at 2.45 GHz. A maximum third-order output intercept point of 34 dBm is achieved at 20.2 dBm output power with a corresponding IMD3 of −33.4 dBc. When tested with a 20 MHz LTE signal, the PA delivers 19 dBm maximum linear output power for an adjacent channel leakage ratio specification of −30 dBc.\u0000\u0000\u0000Originality/value\u0000In this study, a novel cascaded gm3 cancellation technique has been implemented to achieve a maximum linear output power under modulated signals.\u0000","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-02-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45342137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology","authors":"S. Kassa, Prateek Gupta, Manoj Kumar, Thompson Stephan, R. Kannan","doi":"10.1108/CW-06-2020-0120","DOIUrl":"https://doi.org/10.1108/CW-06-2020-0120","url":null,"abstract":"\u0000Purpose\u0000In nano-scale-based very large scale integration technology, quantum-dot cellular automata (QCA) is considered as a strong and capable technology to replace the well-known complementary metal oxide semiconductor technology. In QCA technique, rotated majority gate (RMG) design is not explored greatly, and therefore, its advantages compared to original majority gate are unnoticed. This paper aims to provide a thorough observation at RMG gate with its capability to build robust circuits.\u0000\u0000\u0000Design/methodology/approach\u0000This paper presents a new methodology for structuring reliable 2n-bit full adder (FA) circuit design in QCA utilizing RMG. Mathematical proof is provided for RMG gate structure. A new 1-bit FA circuit design is projected here, which is constructed with RMG gate and clock-zone-based crossover approach in its configuration.\u0000\u0000\u0000Findings\u0000A new structure of a FA is projected in this paper. The proposed design uses only 50 number of QCA cells in its implementation with a latency of 3 clock zones. The proposed 1-bit FA design conception has been checked for its structure robustness by designing various 2, 4, 8, 16, 32 and 64-bit FA designs. The proposed FA designs save power from 46.87% to 25.55% at maximum energy dissipation of circuit level, 39.05% to 23.36% at average energy dissipation of circuit-level and 42.03% to 37.18% at average switching energy dissipation of circuit level.\u0000\u0000\u0000Originality/value\u0000This paper fulfills the gape of focused research for RMG with its detailed mathematical modeling analysis.\u0000","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-02-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47202709","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Integrated DC-AC and AC-DC converter using H-converter for wide range voltage applications","authors":"R. Saravanan, S. Vijayshankar, S. Sathyaseelan, K. Suresh","doi":"10.1108/CW-11-2019-0180","DOIUrl":"https://doi.org/10.1108/CW-11-2019-0180","url":null,"abstract":"\u0000Purpose\u0000This paper aims to propose Hidden Converter (H-Converter) combined with dual port 3Ø inverter for energy storage application to produce wide range of voltage. Some of the application required wide range of voltages, but problem from E-chopper is either boost or buck mode of operations, both modes are not possible. To overcome this drawback, H-Converter is combined with dual port 3Ø inverter controlled by carrier-based pulse width modulation (CB-PWM) technique is added with zero sequence injection.\u0000\u0000\u0000Design/methodology/approach\u0000Hidden converter is a bidirectional DC-DC chopper used to convert fixed DC to variable DC and vice versa in both buck and boost modes of operations. Dual port inverter is combined with hidden DC-DC converter can produce wide range of voltages.\u0000\u0000\u0000Findings\u0000The bidirectional DC-AC converter requires less power for processing and consumes less power losses by using modest carrier built- pulse width modulation scheme through proposed zero structure addition.\u0000\u0000\u0000Originality/value\u0000By using this proposed strategy H-Converter can produce wide range of voltage in both the sides and mostly power is processed in the 3Ø inverter with a one stage conversion with less power loss. As a result, with one stage power conversion has more efficiency because of less power loss. This proposed converter has designed by analysis, and the real time result is tested in an experiment.\u0000","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-02-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43643164","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A new two-element MIMO antenna system for cognitive radio applications","authors":"D. Srikar, S. Anuradha","doi":"10.1108/CW-06-2020-0101","DOIUrl":"https://doi.org/10.1108/CW-06-2020-0101","url":null,"abstract":"\u0000Purpose\u0000This study aims to propose a two-element multi-input-multi-output (MIMO) antenna for cognitive radio MIMO applications to avoid the complexities involved in reconfigurable antennas and improve the spectrum utilization efficiency.\u0000\u0000\u0000Design/methodology/approach\u0000The proposed MIMO antenna system comprises a wideband antenna that operates at 2 GHz–12 GHz for sensing the spectrum and four pairs of antennas for communication, which are single and dual-band antennas. Each pair of antennas meant for communication consists of two similar antennas. Moreover, the antennas meant for communication cover 93% of the bandwidth of the sensing antenna.\u0000\u0000\u0000Findings\u0000The first pair of antennas accessible at ports P2 and P6 and the second pair of antennas accessible at ports P4 and P8, which are dual-band antennas, operate at 3.05 GHz–3.85 GHz, 5.8 GHz–8 GHz and 2.05 GHz–2.55 GHz, 4.7 GHz–6.1 GHz, respectively. While the third pair of antennas accessible at ports P3 and P7 and the fourth pair of antennas accessible at ports P5 and P9 are single-band antennas and operate at 3.85 GHz–4.7 GHz and 8 GHz–11 GHz, respectively. Minimum isolations of 20 dB and 15 dB are attained between every two similar antennas for communication and between the sensing antenna and the antennas meant for communication, respectively. The correctness of the proposed antenna is verified with a fine match between the results obtained from simulations and measurements.\u0000\u0000\u0000Originality/value\u0000The proposed MIMO antenna possesses salient features, such as polarization diversity and performing a maximum of four communication tasks when all the white spaces are detected.\u0000","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44386874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Optically transparent terahertz triple-band and dual-band metamaterial absorber","authors":"A. Elakkiya, R. Sankararajan, B. S. Sreeja","doi":"10.1108/CW-05-2020-0083","DOIUrl":"https://doi.org/10.1108/CW-05-2020-0083","url":null,"abstract":"\u0000Purpose\u0000The proposed metamaterial absorber (MMA) has the following advantages: first, the structure of the MMA consists of one planar metallic resonator, which presents a new design approach to obtain a multiband absorption response, rather than using multiple unit-cells in the one large unit cell or stacking different layers. Second, the simultaneous realization of triple-band and dual-band absorption (or bi-functional absorption) at five different frequencies can integrate the respective advantages of the triple functions of the triple-band MMA and double-band MMA, and therefore, the bi-functional MMA will find more application prospects than multiple-functional devices of triple-band and dual-band. Third, the authors simulated the three combinations of MMA here, which is indium tin oxide (ITO)-Polyimide-ITO, ITO-Teflon-ITO and ITO-polyethylene terephthalate (PET)-ITO for the same planar structure and achieve a high absorption rate. Finally, the proposed structure is polarization and angle independent in nature.\u0000\u0000\u0000Design/methodology/approach\u0000This absorption device consists of the top circular resonator, the middle insulating SiO2 medium layer and the bottom metallic copper ground plane placed on a substrate. The conductivity of the copper metal is s = 5.8 × 107 s/m. As the transmission of the MMA structure is zero, the substrate materials can be selected randomly. Totally four combinations of terahertz MMA are designed and simulated here which are ITO- SiO2 –ITO, ITO-Polyimide-ITO, ITO-Teflon-ITO and ITO- PET-ITO for the same planar structure.\u0000\u0000\u0000Findings\u0000Compared with previous MMAs, the proposed MMA has the following advantages: First, the structure of the MMA consists of one planar metallic resonator, which presents a new design approach to obtain a multiband absorption response, rather than using multiple unit-cells in the one large unit cell or stacking different layers. Second, the simultaneous realization of triple-band and dual-band absorption (or bi-functional absorption) at five different frequencies can integrate the respective advantages of the triple functions of the triple-band MMA and double-band MMA, and therefore, the bi-functional MMA will find more application prospects than multiple-functional devices of triple-band and dual-band. Third, the authors simulated the three combinations of MMA here, which is ITO-polyimide-ITO, ITO-Teflon-ITO and ITO- PET-ITO for the same planar structure and achieve a high absorption rate. Finally, the proposed structure is polarization and angle independent in nature.\u0000\u0000\u0000Originality/value\u0000First, the structure of the MMA consists of one planar metallic resonator, which presents a new design approach to obtain a multiband absorption response, rather than using multiple unit-cells in the one large unit cell or stacking different layers. Second, the simultaneous realization of triple-band and dual-band absorption (or bi-functional absorption) at five different frequencies can integrate the respective ","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-01-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42606825","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"HMSIW- and QMSIW-based antenna for wireless communication application","authors":"Alpesh Vala, Amit V. Patel, Keyur K. Mahant, Jitendra P. Chaudhari, Hiren K. Mewada","doi":"10.1108/CW-07-2020-0149","DOIUrl":"https://doi.org/10.1108/CW-07-2020-0149","url":null,"abstract":"\u0000Purpose\u0000The purpose of this paper is to design and develop half-mode substrate-integrated waveguide (HMSIW)- and quarter-mode substrate-integrated waveguide (QMSIW)-based antennas for wireless communication application. The developed antennas offer advantages in terms of compactness, high gain and better isolation between the ports.\u0000\u0000\u0000Design/methodology/approach\u0000Initially, the tri-band substrate-integrated waveguide-based antenna is designed using a slot on the ground plane. Then, the same structure has been bisected into two parts for the development of the HMSIW structure. Again the concept of the slot is used for the realization of a dual-band antenna. QMSIW-based structure is designed with further dividing HMSIW structure into two parts. Simulation has been carried out with the use of a high-frequency structure simulator (HFSS) software, which used a finite element-based solver for the full-wave analysis.\u0000\u0000\u0000Findings\u0000The proposed HMSIW-based dual-band antenna resonates at two different frequencies, namely, 5.81 GHz with 4.5 dBi gain and at 6.19 GHz with 6.8 dBi gain. Isolation between two ports is 20 dB. The overall dimensions of the proposed model are 0.39 λ × 0.39 λ. Similarly, QMSIW-based antenna is resonated at 5.66 GHz of the frequency with the 3 dBi gain. Frequency tuning is also carried out with the change in the slot dimension to use the proposed antenna in various C (4–8 GHz) band applications.\u0000\u0000\u0000Originality/value\u0000The proposed antennas can use C band wireless frequency application. The proposed structure provides better performance in terms of isolation between the ports, small size, high front-to-back ratio and higher gain. It is fabricated for the proof of concept with the RT Duroid 5880 substrate material having a 2.2 permittivity. Measured results show a similar kind of performance as a simulated one.\u0000","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":"1 1","pages":""},"PeriodicalIF":0.9,"publicationDate":"2021-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41435131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}