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Branching Bisimilarity for Processes with Time-outs 超时过程的分支相似性
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-19 DOI: arxiv-2408.10117
Gaspard Reghem, Rob van Glabbeek
{"title":"Branching Bisimilarity for Processes with Time-outs","authors":"Gaspard Reghem, Rob van Glabbeek","doi":"arxiv-2408.10117","DOIUrl":"https://doi.org/arxiv-2408.10117","url":null,"abstract":"This paper provides an adaptation of branching bisimilarity to reactive\u0000systems with time-outs. Multiple equivalent definitions are procured, along\u0000with a modal characterisation and a proof of its congruence property for a\u0000standard process algebra with recursion. The last section presents a complete\u0000axiomatisation for guarded processes without infinite sequences of unobservable\u0000actions.","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"57 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142192466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Logic for Policy Based Resource Exchanges in Multiagent Systems 多代理系统中基于政策的资源交换逻辑
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-18 DOI: arxiv-2408.09516
Lorenzo Ceragioli, Pierpaolo Degano, Letterio Galletta, Luca Viganò
{"title":"A Logic for Policy Based Resource Exchanges in Multiagent Systems","authors":"Lorenzo Ceragioli, Pierpaolo Degano, Letterio Galletta, Luca Viganò","doi":"arxiv-2408.09516","DOIUrl":"https://doi.org/arxiv-2408.09516","url":null,"abstract":"In multiagent systems autonomous agents interact with each other to achieve\u0000individual and collective goals. Typical interactions concern negotiation and\u0000agreement on resource exchanges. Modeling and formalizing these agreements pose\u0000significant challenges, particularly in capturing the dynamic behaviour of\u0000agents, while ensuring that resources are correctly handled. Here, we propose\u0000exchange environments as a formal setting where agents specify and obey\u0000exchange policies, which are declarative statements about what resources they\u0000offer and what they require in return. Furthermore, we introduce a decidable\u0000extension of the computational fragment of linear logic as a fundamental tool\u0000for representing exchange environments and studying their dynamics in terms of\u0000provability.","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"9 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142192468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Löb-Safe Logics for Reflective Agents 反思型代理的洛布安全逻辑
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-18 DOI: arxiv-2408.09590
Seth Ahrenbach
{"title":"Löb-Safe Logics for Reflective Agents","authors":"Seth Ahrenbach","doi":"arxiv-2408.09590","DOIUrl":"https://doi.org/arxiv-2408.09590","url":null,"abstract":"Epistemic and doxastic logics are modal logics for knowledge and belief, and\u0000serve as foundational models for rational agents in game theory, philosophy,\u0000and computer science. We examine the consequences of modeling agents capable of\u0000a certain sort of reflection. Such agents face a formal difficulty due to\u0000L\"ob's Theorem, called L\"ob's Obstacle in the literature. We show how the\u0000most popular axiom schemes of epistemic and doxastic logics suffer from L\"ob's\u0000Obstacle, and present two axiom schemes that that avoid L\"ob's Obstacle, which\u0000we call Reasonable L\"ob-Safe Epistemic Doxastic logic (${LSED}^R$) and\u0000Justified L\"ob-Safe Epistemic Doxastic logic (${LSED}^J$).","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"2 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142192467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
PREMAP: A Unifying PREiMage APproximation Framework for Neural Networks PREMAP：神经网络的统一 PREiMage APproximation 框架
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-17 DOI: arxiv-2408.09262
Xiyue Zhang, Benjie Wang, Marta Kwiatkowska, Huan Zhang
{"title":"PREMAP: A Unifying PREiMage APproximation Framework for Neural Networks","authors":"Xiyue Zhang, Benjie Wang, Marta Kwiatkowska, Huan Zhang","doi":"arxiv-2408.09262","DOIUrl":"https://doi.org/arxiv-2408.09262","url":null,"abstract":"Most methods for neural network verification focus on bounding the image,\u0000i.e., set of outputs for a given input set. This can be used to, for example,\u0000check the robustness of neural network predictions to bounded perturbations of\u0000an input. However, verifying properties concerning the preimage, i.e., the set\u0000of inputs satisfying an output property, requires abstractions in the input\u0000space. We present a general framework for preimage abstraction that produces\u0000under- and over-approximations of any polyhedral output set. Our framework\u0000employs cheap parameterised linear relaxations of the neural network, together\u0000with an anytime refinement procedure that iteratively partitions the input\u0000region by splitting on input features and neurons. The effectiveness of our\u0000approach relies on carefully designed heuristics and optimization objectives to\u0000achieve rapid improvements in the approximation volume. We evaluate our method\u0000on a range of tasks, demonstrating significant improvement in efficiency and\u0000scalability to high-input-dimensional image classification tasks compared to\u0000state-of-the-art techniques. Further, we showcase the application to\u0000quantitative verification and robustness analysis, presenting a sound and\u0000complete algorithm for the former and providing sound quantitative results for\u0000the latter.","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"24 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142192471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Unified Automata-Theoretic Approach to LTLf Modulo Theories (Extended Version) LTLf 模数理论的统一自动机理论方法（扩展版）
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-16 DOI: arxiv-2408.08817
Marco Faella, Gennaro Parlato
{"title":"A Unified Automata-Theoretic Approach to LTLf Modulo Theories (Extended Version)","authors":"Marco Faella, Gennaro Parlato","doi":"arxiv-2408.08817","DOIUrl":"https://doi.org/arxiv-2408.08817","url":null,"abstract":"We present a novel automata-based approach to address linear temporal logic\u0000modulo theory (LTL-MT) as a specification language for data words. LTL-MT\u0000extends LTL_f by replacing atomic propositions with quantifier-free\u0000multi-sorted first-order formulas interpreted over arbitrary theories. While\u0000standard LTL_f is reduced to finite automata, we reduce LTL-MT to symbolic\u0000data-word automata (SDWAs), whose transitions are guarded by constraints from\u0000underlying theories. Both the satisfiability of LTL-MT and the emptiness of\u0000SDWAs are undecidable, but the latter can be reduced to a system of constrained\u0000Horn clauses, which are supported by efficient solvers and ongoing research\u0000efforts. We discuss multiple applications of our approach beyond\u0000satisfiability, including model checking and runtime monitoring. Finally, a set\u0000of empirical experiments shows that our approach to satisfiability works at\u0000least as well as a previous custom solution.","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"75 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142192472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Message complexity for unary multiautomata systems 一元多配系统的信息复杂性
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-16 DOI: arxiv-2408.09002
Christian Choffrut
{"title":"Message complexity for unary multiautomata systems","authors":"Christian Choffrut","doi":"arxiv-2408.09002","DOIUrl":"https://doi.org/arxiv-2408.09002","url":null,"abstract":"Finitely many two-way automata work independently and synchronously on a\u0000unary input. Some of their states are broadcasting, i.e., dispatched to all\u0000other automata. At each step of the computation, each automaton changes state\u0000and moves right, left or stay in place according to the current state and the\u0000possible messages dispatched. The input is recognized if the following occurs:\u0000starting from the initial configuration (the heads of all automata are\u0000positioned to the left end of the tape) one automaton reaches a final state\u0000when its head is positioned to the right end of the tape. We show that if the\u0000number of messages sent during the computation is bounded by some integer which\u0000is independent of the length of the input, then the language recognized is\u0000regular,","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"10 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142192469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Computational Complexity of Standpoint LTL Standpoint LTL 的计算复杂性
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-16 DOI: arxiv-2408.08557
Stéphane Demri, Przemysław Andrzej Wałęga
{"title":"Computational Complexity of Standpoint LTL","authors":"Stéphane Demri, Przemysław Andrzej Wałęga","doi":"arxiv-2408.08557","DOIUrl":"https://doi.org/arxiv-2408.08557","url":null,"abstract":"Standpoint linear temporal logic SLTL is a recent formalism able to model\u0000possibly conflicting commitments made by distinct agents, taking into account\u0000aspects of temporal reasoning. In this paper, we analyse the computational\u0000properties of SLTL. First, we establish logarithmic-space reductions between\u0000the satisfiability problems for the multi-dimensional modal logic PTLxS5 and\u0000SLTL. This leads to the EXPSPACE-completeness of the satisfiability problem in\u0000SLTL, which is a surprising result in view of previous investigations. Next, we\u0000present a method of restricting SLTL so that the obtained fragment is a strict\u0000extension of both the (non-temporal) standpoint logic and linear-time temporal\u0000logic LTL, but the satisfiability problem is PSPACE-complete in this fragment.\u0000Thus, we show how to combine standpoint logic with LTL so that the worst-case\u0000complexity of the obtained combination is not higher than of pure LTL.","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"7 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142192473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Symbolic Parameter Learning in Probabilistic Answer Set Programming 概率答案集编程中的符号参数学习
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-16 DOI: arxiv-2408.08732
Damiano Azzolini, Elisabetta Gentili, Fabrizio Riguzzi
{"title":"Symbolic Parameter Learning in Probabilistic Answer Set Programming","authors":"Damiano Azzolini, Elisabetta Gentili, Fabrizio Riguzzi","doi":"arxiv-2408.08732","DOIUrl":"https://doi.org/arxiv-2408.08732","url":null,"abstract":"Parameter learning is a crucial task in the field of Statistical Relational\u0000Artificial Intelligence: given a probabilistic logic program and a set of\u0000observations in the form of interpretations, the goal is to learn the\u0000probabilities of the facts in the program such that the probabilities of the\u0000interpretations are maximized. In this paper, we propose two algorithms to\u0000solve such a task within the formalism of Probabilistic Answer Set Programming,\u0000both based on the extraction of symbolic equations representing the\u0000probabilities of the interpretations. The first solves the task using an\u0000off-the-shelf constrained optimization solver while the second is based on an\u0000implementation of the Expectation Maximization algorithm. Empirical results\u0000show that our proposals often outperform existing approaches based on projected\u0000answer set enumeration in terms of quality of the solution and in terms of\u0000execution time. The paper has been accepted at the ICLP2024 conference and is\u0000under consideration in Theory and Practice of Logic Programming (TPLP).","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"131 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142192474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement 重新审视物理感知合成：利用原始逻辑门布局指导技术映射
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-15 DOI: arxiv-2408.07886
Hongyang Pan, Cunqing Lan, Yiting Liu, Zhiang Wang, Li Shang, Xuan Zeng, Fan Yang, Keren Zhu
{"title":"Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement","authors":"Hongyang Pan, Cunqing Lan, Yiting Liu, Zhiang Wang, Li Shang, Xuan Zeng, Fan Yang, Keren Zhu","doi":"arxiv-2408.07886","DOIUrl":"https://doi.org/arxiv-2408.07886","url":null,"abstract":"A typical VLSI design flow is divided into separated front-end logic\u0000synthesis and back-end physical design (PD) stages, which often require costly\u0000iterations between these stages to achieve design closure. Existing approaches\u0000face significant challenges, notably in utilizing feedback from physical\u0000metrics to better adapt and refine synthesis operations, and in establishing a\u0000unified and comprehensive metric. This paper introduces a new Primitive logic\u0000gate placement guided technology MAPping (PigMAP) framework to address these\u0000challenges. With approximating technology-independent spatial information, we\u0000develop a novel wirelength (WL) driven mapping algorithm to produce PD-friendly\u0000netlists. PigMAP is equipped with two schemes: a performance mode that focuses\u0000on optimizing the critical path WL to achieve high performance, and a power\u0000mode that aims to minimize the total WL, resulting in balanced power and\u0000performance outcomes. We evaluate our framework using the EPFL benchmark suites\u0000with ASAP7 technology, using the OpenROAD tool for place-and-route. Compared\u0000with OpenROAD flow scripts, performance mode reduces delay by 14% while\u0000increasing power consumption by only 6%. Meanwhile, power mode achieves a 3%\u0000improvement in delay and a 9% reduction in power consumption.","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"3 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142224942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficiently grounding FOL using bit vectors 使用位向量高效地将 FOL 落地
arXiv - CS - Logic in Computer Science Pub Date : 2024-08-15 DOI: arxiv-2408.07980
Lucas Van Laer, Simon Vandevelde, Joost Vennekens
{"title":"Efficiently grounding FOL using bit vectors","authors":"Lucas Van Laer, Simon Vandevelde, Joost Vennekens","doi":"arxiv-2408.07980","DOIUrl":"https://doi.org/arxiv-2408.07980","url":null,"abstract":"Several paradigms for declarative problem solving start from a specification\u0000in a high-level language, which is then transformed to a low-level language,\u0000such as SAT or SMT. Often, this transformation includes a \"grounding\" step to\u0000remove first-order quantification. To reduce the time and size of the\u0000grounding, it can be useful to simplify formulas along the way, e.g., by\u0000already taking into account the interpretation of symbols that are already\u0000known. In this paper, we investigate the use of bit vectors to efficiently\u0000simplify formulas, thereby taking advantage of the fact that, on modern\u0000hardware, logical operations on bit vectors can be executed extremely fast. We\u0000conduct an experimental analysis, which shows that bit vectors are indeed fast\u0000for certain problems, but also have limitations.","PeriodicalId":501208,"journal":{"name":"arXiv - CS - Logic in Computer Science","volume":"1 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142224943","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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