Journal of Zhejiang University-Science C-Computers & Electronics最新文献

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An algorithm for identifying symmetric variables in the canonical OR-coincidence algebra system 正则或符合代数系统中对称变量的识别算法
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1400093
Xiao-hua Li, Ji-Zhong Shen
{"title":"An algorithm for identifying symmetric variables in the canonical OR-coincidence algebra system","authors":"Xiao-hua Li, Ji-Zhong Shen","doi":"10.1631/jzus.C1400093","DOIUrl":"https://doi.org/10.1631/jzus.C1400093","url":null,"abstract":"To simplify the process for identifying 12 types of symmetric variables in the canonical OR-coincidence (COC) algebra system, we propose a new symmetry detection algorithm based on OR-NXOR expansion. By analyzing the relationships between the coefficient matrices of sub-functions and the order coefficient subset matrices based on OR-NXOR expansion around two arbitrary logical variables, the constraint conditions of the order coefficient subset matrices are revealed for 12 types of symmetric variables. Based on the proposed constraints, the algorithm is realized by judging the order characteristic square value matrices. The proposed method avoids the transformation process from OR-NXOR expansion to AND-OR-NOT expansion, or to AND-XOR expansion, and solves the problem of completeness in the dj-map method. The application results show that, compared with traditional methods, the new algorithm is an optimal detection method in terms of applicability of the number of logical variables, detection type, and complexity of the identification process. The algorithm has been implemented in C language and tested on MCNC91 benchmarks. Experimental results show that the proposed algorithm is convenient and efficient.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1400093","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67536139","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Folded down-conversion mixer for a 60 GHz receiver architecture in 65-nm CMOS technology 采用65纳米CMOS技术的60 GHz接收器架构的折叠下转换混频器
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1400087
Najam Muhammad Amin, Zhigong Wang, Zhiqun Li
{"title":"Folded down-conversion mixer for a 60 GHz receiver architecture in 65-nm CMOS technology","authors":"Najam Muhammad Amin, Zhigong Wang, Zhiqun Li","doi":"10.1631/jzus.C1400087","DOIUrl":"https://doi.org/10.1631/jzus.C1400087","url":null,"abstract":"We present the design of a folded down-conversion mixer which is incorporated at the final down-conversion stage of a 60 GHz receiver. The mixer employs an ac-coupled current reuse transconductance stage. It performs well under low supply voltages, and is less sensitive to temperature variations and process spread. The mixer operates at an input radio frequency (RF) band ranging from 10.25 to 13.75 GHz, with a fixed local oscillator (LO) frequency of 12 GHz, which down-converts the RF band to an intermediate frequency (IF) band ranging from dc to 1.75 GHz. The mixer is designed in a 65 nm low power (LP) CMOS process with an active chip area of only 0.0179 mm2. At a nominal supply voltage of 1.2 V and an IF of 10 MHz, a maximum voltage conversion gain (VCG) of 9.8 dB, a double sideband noise figure (DSB-NF) of 11.6 dB, and a linearity in terms of input 1 dB compression point (Pin,1dB) of −13 dBm are measured. The mixer draws a current of 5 mA from a 1.2 V supply dissipating a power of only 6 mW.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1400087","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67536021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Optimizing urban traffic control using a rational agent 利用理性agent优化城市交通控制
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1400037
Salvador Ibarra-Martínez, J. A. Castán-Rocha, Julio Laria-Menchaca
{"title":"Optimizing urban traffic control using a rational agent","authors":"Salvador Ibarra-Martínez, J. A. Castán-Rocha, Julio Laria-Menchaca","doi":"10.1631/jzus.C1400037","DOIUrl":"https://doi.org/10.1631/jzus.C1400037","url":null,"abstract":"This paper is devoted to developing and evaluating a set of technologies with the objective of designing a methodology for the implementation of sophisticated traffic lights by means of rational agents. These devices would be capable of optimizing the behavior of a junction with multiple traffic signals, reaching a higher level of autonomy without losing reliability, accuracy, or efficiency in the offered services. In particular, each rational agent in a traffic signal will be able to analyze the requirements and constraints of the road, in order to know its level of demand. With such information, the rational agent will adapt its light cycles with the view of accomplishing more fluid traffic patterns and minimizing the pollutant environmental emissions produced by vehicles while they are stopped at a red light, through using a case-based reasoning (CBR) adaptation. This paper also integrates a microscopic simulator developed to run a set of tests in order to compare the presented methodology with traditional traffic control methods. Two study cases are shown to demonstrate the efficiency of the introduced approach, increasing vehicular mobility and reducing harmful activity for the environment. For instance, in the first scenario, taking into account the studied traffic volumes, our approach increases mobility by 23% and reduces emissions by 35%. When the roads are managed by sophisticated traffic lights, a better level of service and considerable environmental benefits are achieved, demonstrating the utility of the presented approach.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1400037","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67535720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A new parallel meshing technique integrated into the conformal FDTD method for solving complex electromagnetic problems 结合共形时域有限差分法求解复杂电磁问题的一种新的并行网格技术
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1400135
Yang Guo, Xiang-hua Wang, J. Hu
{"title":"A new parallel meshing technique integrated into the conformal FDTD method for solving complex electromagnetic problems","authors":"Yang Guo, Xiang-hua Wang, J. Hu","doi":"10.1631/jzus.C1400135","DOIUrl":"https://doi.org/10.1631/jzus.C1400135","url":null,"abstract":"A new efficient parallel finite-difference time-domain (FDTD) meshing algorithm, based on the ray tracing technique, is proposed in this paper. This algorithm can be applied to construct various FDTD meshes, such as regular and conformal ones. The Microsoft F# language is used for the algorithm coding, where all variables are unchangeable with its parallelization advantage being fully exploited. An improved conformal FDTD algorithm, also integrated with an improved surface current algorithm, is presented to simulate some complex 3D models, such as a sphere ball made of eight different materials, a tank, a J-10 aircraft, and an aircraft carrier with 20 aircrafts. Both efficiency and capability of the developed parallel FDTD algorithm are validated. The algorithm is applied to characterize the induced surface current distribution on an aircraft or a warship.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1400135","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67536651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A 31–45.5 GHz injection-locked frequency divider in 90-nm CMOS technology 基于90纳米CMOS技术的31-45.5 GHz注入锁定分频器
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1400080
Fa-en Liu, Zhigong Wang, Zhiqun Li, Qin Li, Lu Tang, Geliang Yang
{"title":"A 31–45.5 GHz injection-locked frequency divider in 90-nm CMOS technology","authors":"Fa-en Liu, Zhigong Wang, Zhiqun Li, Qin Li, Lu Tang, Geliang Yang","doi":"10.1631/jzus.C1400080","DOIUrl":"https://doi.org/10.1631/jzus.C1400080","url":null,"abstract":"We present a 31–45.5 GHz injection-locked frequency divider (ILFD) implemented in a standard 90-nm CMOS process. To reduce parasitic capacitance and increase the operating frequency, an NMOS-only cross-coupled pair is adopted to provide negative resistance. Acting as an adjustable resistor, an NMOS transistor with a tunable gate bias voltage is connected to the differential output terminals for locking range extension. Measurements show that the designed ILFD can be fully functional in a wide locking range and provides a good figure-of-merit. Under a 1 V tunable bias voltage, the self-resonant frequency of the divider is 19.11 GHz and the maximum locking range is 37.7% at 38.5 GHz with an input power of 0 dBm. The power consumption is 2.88 mW under a supply voltage of 1.2 V. The size of the chip including the pads is 0.62 mm×0.42 mm.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1400080","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67535597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Speech enhancement with a GSC-like structure employing sparse coding 采用稀疏编码的类gsc结构语音增强
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1400085
Li-chun Yang, Yun-tao Qian
{"title":"Speech enhancement with a GSC-like structure employing sparse coding","authors":"Li-chun Yang, Yun-tao Qian","doi":"10.1631/jzus.C1400085","DOIUrl":"https://doi.org/10.1631/jzus.C1400085","url":null,"abstract":"Speech communication is often influenced by various types of interfering signals. To improve the quality of the desired signal, a generalized sidelobe canceller (GSC), which uses a reference signal to estimate the interfering signal, is attracting attention of researchers. However, the interference suppression of GSC is limited since a little residual desired signal leaks into the reference signal. To overcome this problem, we use sparse coding to suppress the residual desired signal while preserving the reference signal. Sparse coding with the learned dictionary is usually used to reconstruct the desired signal. As the training samples of a desired signal for dictionary learning are not observable in the real environment, the reconstructed desired signal may contain a lot of residual interfering signal. In contrast, the training samples of the interfering signal during the absence of the desired signal for interferer dictionary learning can be achieved through voice activity detection (VAD). Since the reference signal of an interfering signal is coherent to the interferer dictionary, it can be well restructured by sparse coding, while the residual desired signal will be removed. The performance of GSC will be improved since the estimate of the interfering signal with the proposed reference signal is more accurate than ever. Simulation and experiments on a real acoustic environment show that our proposed method is effective in suppressing interfering signals.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1400085","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67535978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Supply chain network design under uncertainty with new insights from contracts 基于契约的不确定性下供应链网络设计
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1300279
M. M. Tabrizi, B. Karimi
{"title":"Supply chain network design under uncertainty with new insights from contracts","authors":"M. M. Tabrizi, B. Karimi","doi":"10.1631/jzus.C1300279","DOIUrl":"https://doi.org/10.1631/jzus.C1300279","url":null,"abstract":"In this paper, the classical problem of supply chain network design is reconsidered to emphasize the role of contracts in uncertain environments. The supply chain addressed consists of four layers: suppliers, manufacturers, warehouses, and customers acting within a single period. The single owner of the manufacturing plants signs a contract with each of the suppliers to satisfy demand from downstream. Available contracts consist of long-term and option contracts, and unmet demand is satisfied by purchasing from the spot market. In this supply chain, customer demand, supplier capacity, plants and warehouses, transportation costs, and spot prices are uncertain. Two models are proposed here: a risk-neutral two-stage stochastic model and a risk-averse model that considers risk measures. A solution strategy based on sample average approximation is then proposed to handle large scale problems. Extensive computational studies prove the important role of contracts in the design process, especially a portfolio of contracts. For instance, we show that long-term contract alone has similar impacts to having no contracts, and that option contract alone gives inferior results to a combination of option and long-term contracts. We also show that the proposed solution methodology is able to obtain good quality solutions for large scale problems.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1300279","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67534737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Fuzzy cost-profit tradeoff model for locating a vehicle inspection station considering regional constraints 考虑区域约束的车辆检测站定位模糊成本-收益权衡模型
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1400116
Guangdong Tian, Hua Ke, Xiaowei Chen
{"title":"Fuzzy cost-profit tradeoff model for locating a vehicle inspection station considering regional constraints","authors":"Guangdong Tian, Hua Ke, Xiaowei Chen","doi":"10.1631/jzus.C1400116","DOIUrl":"https://doi.org/10.1631/jzus.C1400116","url":null,"abstract":"Facility location allocation (FLA) is one of the important issues in the logistics and transportation fields. In practice, since customer demands, allocations, and even locations of customers and facilities are usually changing, the FLA problem features uncertainty. To account for this uncertainty, some researchers have addressed the fuzzy profit and cost issues of FLA. However, a decision-maker needs to reach a specific profit, minimizing the cost to target customers. To handle this issue it is essential to propose an effective fuzzy cost-profit tradeoff approach of FLA. Moreover, some regional constraints can greatly influence FLA. By taking a vehicle inspection station as a typical automotive service enterprise example, and combined with the credibility measure of fuzzy set theory, this work presents new fuzzy cost-profit tradeoff FLA models with regional constraints. A hybrid algorithm integrating fuzzy simulation and genetic algorithms (GA) is proposed to solve the proposed models. Some numerical examples are given to illustrate the proposed models and the effectiveness of the proposed algorithm.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1400116","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67536009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Degree elevation of unified and extended spline curves 统一和扩展样条曲线的度标高
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1400076
Xiao-juan Duan, Guozhen Wang
{"title":"Degree elevation of unified and extended spline curves","authors":"Xiao-juan Duan, Guozhen Wang","doi":"10.1631/jzus.C1400076","DOIUrl":"https://doi.org/10.1631/jzus.C1400076","url":null,"abstract":"Unified and extended splines (UE-splines), which unify and extend polynomial, trigonometric, and hyperbolic B-splines, inherit most properties of B-splines and have some advantages over B-splines. The interest of this paper is the degree elevation algorithm of UE-spline curves and its geometric meaning. Our main idea is to elevate the degree of UE-spline curves one knot interval by one knot interval. First, we construct a new class of basis functions, called bi-order UE-spline basis functions which are defined by the integral definition of splines. Then some important properties of bi-order UE-splines are given, especially for the transformation formulae of the basis functions before and after inserting a knot into the knot vector. Finally, we prove that the degree elevation of UE-spline curves can be interpreted as a process of corner cutting on the control polygons, just as in the manner of B-splines. This degree elevation algorithm possesses strong geometric intuition.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1400076","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67535530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A 37 GHz wide-band programmable divide-by-N frequency divider for millimeter-wave silicon-based phase-locked loop frequency synthesizers 用于毫米波硅基锁相环频率合成器的37 GHz宽带可编程分频器
Journal of Zhejiang University-Science C-Computers & Electronics Pub Date : 2014-12-01 DOI: 10.1631/jzus.C1400091
Ting Guo, Zhiqun Li, Qin Li, Zhi-Gong Wang
{"title":"A 37 GHz wide-band programmable divide-by-N frequency divider for millimeter-wave silicon-based phase-locked loop frequency synthesizers","authors":"Ting Guo, Zhiqun Li, Qin Li, Zhi-Gong Wang","doi":"10.1631/jzus.C1400091","DOIUrl":"https://doi.org/10.1631/jzus.C1400091","url":null,"abstract":"A 37 GHz wide-band programmable divide-by-N frequency divider (FD) composed of a divide-by-2 divider (acting as the first stage) and a divider with a division ratio range of 273–330 (acting as the second stage) has been designed and fabricated using standard 90 nm CMOS technology. The second stage divider consists of a high-speed divide-by-8/9 dual-modulus prescaler, a pulse counter, and a swallow counter. Both the first stage divider (with high speed) and the divide-by-8/9 prescaler employ dynamic current-mode logic (DCML) structure to improve the operating performance. The first stage divider can work from 2 to 40 GHz and the whole divider covers a wide frequency range from 25 to 37 GHz. The input sensitivity is as low as −20 dBm at 32 GHz and the phase noise at 37 GHz is less than −130 dBc/Hz at an offset of 1 MHz. The whole chip dissipates 17.88 mW at a supply voltage of 1.2 V and occupies an area of only 730 μm ×475 μm.","PeriodicalId":49947,"journal":{"name":"Journal of Zhejiang University-Science C-Computers & Electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1631/jzus.C1400091","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67536067","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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