2010 40th IEEE International Symposium on Multiple-Valued Logic最新文献_第4页

Mapping Binary Functions to a Practical Adiabatic Quantum Computer 将二元函数映射到实用的绝热量子计算机

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.57

David J. Rosenbaum, M. Perkowski

引用次数: 1

Minimal Unsatisfiability: Models, Algorithms and Applications (Invited Paper) 最小不满意度:模型、算法和应用(特邀论文)

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.11

Joao Marques-Silva

引用次数: 57

Reconstruction of Additive Generators from Partial Derivatives of Continuous Archimedean t-Norms 由连续阿基米德t模的偏导数重建可加性生成器

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.52

M. Navara, Milan Petrík, Peter Sarkoci

引用次数: 0

The Euler Characteristic of a Formula in Godel Logic 哥德尔逻辑中一个公式的欧拉特性

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.28

P. Codara, O. D'Antona, V. Marra

引用次数: 5

Finding Attractors in Synchronous Multiple-Valued Networks Using SAT-Based Bounded Model Checking 利用基于sat的有界模型检验寻找同步多值网络中的吸引子

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.35

E. Dubrova, Ming Liu, M. Teslenko

{"title":"Finding Attractors in Synchronous Multiple-Valued Networks Using SAT-Based Bounded Model Checking","authors":"E. Dubrova, Ming Liu, M. Teslenko","doi":"10.1109/ISMVL.2010.35","DOIUrl":"https://doi.org/10.1109/ISMVL.2010.35","url":null,"abstract":"Synchronous multiple-valued networks are a discrete-space discrete-time model of the gene regulatory network of living cells. In this model, cell types are represented by the cycles in the state transition graph of a network, called attractors. When the effect of a disease or a mutation on a cell is studied, attractors have to be re-computed each time a fault is injected in the model. This motivates research on algorithms for finding attractors. Existing decision diagram-based approaches have limited capacity due to the excessive memory requirements of decision diagrams. Simulation-based approaches can be applied to larger networks, however, they are incomplete. We present an algorithm for finding attractors which uses a SAT-based bounded model checking. Our model checking approach exploits the deterministic nature of the network model to reduce runtime. Although the idea of applying model checking to the analysis of gene regulatory networks is not new, to our best knowledge, we are the first to use it for computing all attractors in a model. The efficiency of the presented algorithm is evaluated by analyzing 7 networks models of real biological processes as well as 35.000 randomly generated 4-valued networks. The results show that our approach has a potential to handle an order of magnitude larger models than currently possible.","PeriodicalId":447743,"journal":{"name":"2010 40th IEEE International Symposium on Multiple-Valued Logic","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126119833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 11

Synthesis of Small Reversible and Pseudo-Reversible Circuits Using Y-Gates and Inverse Y-Gates 利用y门和反y门合成小型可逆和伪可逆电路

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.53

M. Perkowski, Nouraddin Alhagi, M. Lukac, N. Saxena, S. Blakely

引用次数: 5

On a Graded Notion of t-Norm and Dominance 论t-范数和优势的分级概念

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.21

L. Behounek, P. Cintula, Ulrich Bodenhofer, Susanne Saminger-Platz, Peter Sarkoci

引用次数: 2

Completions in Subvarieties of BL-Algebras bl -代数子集中的完备性

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.24

M. Busaniche, L. Cabrer

引用次数: 2

Low Voltage Semi Floating-Gate Binary to Multiple-Value and Multiple-Value to Binary Converters 低压半浮门二值到多值转换器和多值到二值转换器

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.22

Y. Berg

引用次数: 8

An Evolutionary Algorithm for Optimization of Pseudo Kronecker Expressions 伪Kronecker表达式优化的进化算法

2010 40th IEEE International Symposium on Multiple-Valued Logic Pub Date : 2010-05-26 DOI: 10.1109/ISMVL.2010.36

A. Finder, R. Drechsler

引用次数: 6