IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.最新文献_第4页

A non-coherent SIMO architecture based on Grassmann codes 基于Grassmann码的非相干SIMO体系结构

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579872

I. Kammoun, A. Cipriano, J. Belfiore

引用次数: 0

Quantitative analysis of vascular structures geometry using neural networks 用神经网络定量分析血管结构几何

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579897

F. Lamberti, B. Montrucchio, A. Gamba

引用次数: 1

Application description concept with system level hardware abstraction 具有系统级硬件抽象的应用描述概念

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579835

R. Hossain, M. Wesseling, C. Leopold

{"title":"Application description concept with system level hardware abstraction","authors":"R. Hossain, M. Wesseling, C. Leopold","doi":"10.1109/SIPS.2005.1579835","DOIUrl":"https://doi.org/10.1109/SIPS.2005.1579835","url":null,"abstract":"Within a recent project at Siemens Communication, we developed a new programming concept called virtual radio engine (VRE), with the goal to provide an efficient development environment for software defined radio (SDR) applications. VRE separates the development process into two steps: first, the application is described in a hardware-independent way using the VRE programming language, and then the implementation is done (to a great part) automatically by the VRE code generator system. As the hardware underlying SDR requires parallel architectures of different kinds to achieve the required high performance within a low power consumption budget, hardware-specific requirements are excluded from the VRE program. Instead, a separate hardware description file supplements the program. Therefore, the application can be described without any prior knowledge of the target hardware, and the same program can be implemented on different parallel hardware platforms. This paper concentrates on the VRE programming language and the graphic representation of VRE programs using Simulink. Special emphasis is given to the representation of different types of control flow.","PeriodicalId":436123,"journal":{"name":"IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123661689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Area and power efficient pipeline FFT algorithm 面积和功率高效的管道FFT算法

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579923

Jung-Yeol Oh, M. Lim

引用次数: 29

A low power VLSI design paradigm for iterative decoders 迭代解码器的低功耗VLSI设计范例

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579878

M. Elassal, A. Baker, M. Bayoumi

引用次数: 1

Blind source separation of speech in hardware 硬件中语音的盲源分离

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579909

N. Hurley, N. Harte, C. Fearon, S. Rickard

引用次数: 4

FPGA implementation for channel estimations based on Wiener LMS for DS-CDMA 基于Wiener LMS的DS-CDMA信道估计FPGA实现

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579940

M. Elnamaky, M. Ahmed-Ouameur, D. Massicotte

引用次数: 2

A novel statistical cut-strategy for DP-based multiple biosequence alignment 一种新的基于dp的多生物序列比对统计切割策略

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579905

Y. Hsiao, Cheng-Long Chuang, Chun-Hung Mo, Cheng-Chih Chien, Joe-Air Jiang

{"title":"A novel statistical cut-strategy for DP-based multiple biosequence alignment","authors":"Y. Hsiao, Cheng-Long Chuang, Chun-Hung Mo, Cheng-Chih Chien, Joe-Air Jiang","doi":"10.1109/SIPS.2005.1579905","DOIUrl":"https://doi.org/10.1109/SIPS.2005.1579905","url":null,"abstract":"In this paper, a novel cut-strategy is presented for solving the problems of multiple biosequence alignment. Sequence comparison is the most important primitive operation for analyzing of the bioinformatics data. The most fundamental method for alignment of several biosequences is the dynamic programming (DP) technique. The DP method is capable of finding optimal alignments for a set of sequences. However, when the length of the sequences increased, the DP method is impracticable due to the computational complexity is extremely high. Therefore, a new method is proposed in this paper for reducing the computational cost of the DP technique. By recursively finding the structural features of the biosequences, the proposed method can divide the biosequences into very small alignment problem, which can be directly solved by DP, or other applicable methods that can produce the results of alignment faster. By utilizing the object-oriented programming technique, the proposed method also provides low memory space consumption during execution. Moreover, the proposed algorithm has been implemented in an x86 demonstration program, and compares the effective and efficient performance with other known method.","PeriodicalId":436123,"journal":{"name":"IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128850045","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

VLSI architecture for an object change detector for visual sensors 一种用于视觉传感器的目标变化检测器的VLSI结构

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579881

R. Aguilar-Ponce, J. Tessier, A. Baker, C. Emmela, J. Das, J. L. Tecpanecatl-Xihuitl, A. Kumar, M. Bayoumi

{"title":"VLSI architecture for an object change detector for visual sensors","authors":"R. Aguilar-Ponce, J. Tessier, A. Baker, C. Emmela, J. Das, J. L. Tecpanecatl-Xihuitl, A. Kumar, M. Bayoumi","doi":"10.1109/SIPS.2005.1579881","DOIUrl":"https://doi.org/10.1109/SIPS.2005.1579881","url":null,"abstract":"Object detection is a crucial step in visual surveillance. Traditionally, object detection has been performed purely in software in surveillance systems. The problem of object detection, however, becomes critical in the upcoming wireless visual sensors because of size and power constraints. The need for low-power, small size, hardware implementations is greatly felt. This paper introduces a VLSI architecture for Wronskian change detector (WCD). Object detection is done through background subtraction. WCD offers regularity, low complexity and accuracy as well as global illumination changes independency. WCD can be employed in automated visual surveillance on buildings and adjacent parking lots. WCD replaces each pixel by a vector containing luminance value of the pixel and its surrounding area. A linear dependency test is applied to each vector to determine if a change has occurred. WCD is mapped into a 12-processing element array with a fixed window value of 3/spl times/3. Design of each processing element is discussed in detail. Based on extensive search, no VLSI implementation of WCD has been reported previously.","PeriodicalId":436123,"journal":{"name":"IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125330437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Improving the battery performance of ad-hoc routing protocols 改进ad-hoc路由协议的电池性能

IEEE Workshop on Signal Processing Systems Design and Implementation, 2005. Pub Date : 1900-01-01 DOI: 10.1109/SIPS.2005.1579959

Q. Qi, C. Chakrabarti

引用次数: 5