Shicheng Zhou, Xiaoyun Qi, Qiushi Kang, Chenxi Wang
{"title":"Low-temperature direct and indirect bonding using plasma activation for 3D integration","authors":"Shicheng Zhou, Xiaoyun Qi, Qiushi Kang, Chenxi Wang","doi":"10.1109/ICTA50426.2020.9331985","DOIUrl":"https://doi.org/10.1109/ICTA50426.2020.9331985","url":null,"abstract":"In this study, plasma activation is demonstrated as a surface activation method in SiCOI (SiC-on-insulator) substrate fabrication, silicon-based wafer bonding, and pressure-less Ag nanopaste sintering for 3D integration. Oxygen inductive coupled plasma (ICP) shows high efficiency in organic removal and surface activation, which not only achieves a tight and reliable direct bonding but also serves for pressure-less sintering of Ag nanopaste by pre-decomposing the organic components. The oxygen plasma activation has exerted its multi-functional nature and excellent performance in both direct and indirect bonding methods. We believe that the plasma activation has sufficient potential as a versatile and efficient approach for heterogeneous integration and high-density packaging.","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129170960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Calibration-Free Low Spur Multi-Phase Sampling PLL","authors":"Gaofeng Jin, Bao Luo, Xiang Gao","doi":"10.1109/icta50426.2020.9332085","DOIUrl":"https://doi.org/10.1109/icta50426.2020.9332085","url":null,"abstract":"This paper presents a low spur multi-phase sampling PLL. It employs a 4-phase sampling phase detection technique to effectively quadruple the sampling rate, while still achieving low spur at the presence of quadrature phase error without calibration. The design is implemented with TSMC 40-nm CMOS and verified with circuit simulation.","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114241122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of Improved KY Converter with Low Power ZCD Circuit for Wide Load Current Application","authors":"Ying Xie, Shiquan Fan, Chenxi Yuan, Li Geng","doi":"10.1109/ICTA50426.2020.9332054","DOIUrl":"https://doi.org/10.1109/ICTA50426.2020.9332054","url":null,"abstract":"In this paper, an improved KY converter with pulse width modulation (PWM) is proposed. The reverse current paths under discontinuous-conduction mode (DCM) are analyzed. To eliminate the reverse current exactly, a noval zero current detection (ZCD) method is proposed and demonstrated. The KY converter is fabricated by using 0.18 $mu$ m BCD process with active area of 3.4 mm2. The off-chip components of an inductor of 4.7 $mu$ H, a load capacitor of 4.7 $mu$ F and two flying capacitors of 100 $mu$ F are employed. Simulated results show that the designed ZCD can work well in DCM of the proposed converter. The power conversion efficiency (PCE) can be maintained above 90% over wide load range from 100 mA to 2 A, and the PCE is enhanced by 16.3% compared with w/o ZCD at 25 mA load current.","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122286501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Low Complexity ECG Biometric Authentication for IoT Edge Devices","authors":"Guoxin Wang, Deepu John, A. Nag","doi":"10.1109/ICTA50426.2020.9332012","DOIUrl":"https://doi.org/10.1109/ICTA50426.2020.9332012","url":null,"abstract":"Wearable Internet of Things (IoT) devices are getting ubiquitous for continuous physiological data acquisition and health monitoring. This paper investigates an electrocardiogram (ECG) based biometric user authentication technique for IoT edge devices. A convolutional neural network (CNN) based deep learning technique for user authentication is proposed. The proposed technique achieves an authentication accuracy of 99.63% when tested with 290 subjects from Physionet PTB ECG database. To limit the complexity of the technique for IoT edge nodes, we applied optimisation techniques such as binarisation and approximation of the CNN weights. Accuracy-vs-time-complexity trade-off analysis is performed and results are presented for different optimisations. Our evaluations shows that the complexity-optimised method achieves 98.88% authentication accuracy with acceptable CPU cycles consumed.","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134110707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 77-GHz 1.5-mW Down-Conversion Mixer Using Active Loads Technique in 40-nm CMOS for Automotive Radar Application","authors":"Chenyu Xu, Jinhua Chen, Dixian Zhao","doi":"10.1109/ICTA50426.2020.9332105","DOIUrl":"https://doi.org/10.1109/ICTA50426.2020.9332105","url":null,"abstract":"A modified Gilbert down-conversion mixer for 77-GHz automotive radar application is presented in this paper. By replacing the resistive loads with active loads composed of resistors and PMOSs, the output DC voltage becomes stabler, and the suppression of even-order components is improved. Fabricated in 40-nm CMOS technology, the proposed mixer occupies a core chip area of $0.25 times 0.26$ mm2. The DC power consumption is only 1.5 mW with a 1-V supply. The measured maximum voltage conversion gain is 4.8 dB at LO frequency of 78.5 GHz and IF frequency of 20 MHz. The input 1-dB compression point is 0.8 dBm. Measured results also show that the reflection coefficient of the RF port is less than -11 dB from 74 to 83 GHz.","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133983373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Dongfang Xu, Zhang Qiu, Xiongshi Luo, Xuewei You, Wenbo Xiao, Siqiang Zhu, Minzhe Tang, Zhenghao Li, Quan Pan
{"title":"Fully-Differential 100-Gb/s PAM4 Cross-Coupled Regulated Transimpedance Amplifier","authors":"Dongfang Xu, Zhang Qiu, Xiongshi Luo, Xuewei You, Wenbo Xiao, Siqiang Zhu, Minzhe Tang, Zhenghao Li, Quan Pan","doi":"10.1109/ICTA50426.2020.9332048","DOIUrl":"https://doi.org/10.1109/ICTA50426.2020.9332048","url":null,"abstract":"This paper describes a broadband differential regulated cascode (RGC) transimpedance amplifier (TIA) designed in 130-nm SiGe process. Cross-coupled structure and two common emitter (CE) stages feedback loop are employed to reduce input impedance. The simulation results show that the proposed TIA has 46.35-dB $Omega$ differential transimpedance gain and 35.6-GHz bandwidth (BW). Overall, it achieves a clear 100-Gb/s PAM4 eye diagram. The total power consumption is 84mW.","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133706941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"ICTA 2020 Front Matter","authors":"","doi":"10.1109/icta50426.2020.9331983","DOIUrl":"https://doi.org/10.1109/icta50426.2020.9331983","url":null,"abstract":"","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132445342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Fan Xiao, Hongyi Liu, Yaxin Liu, Mingyi Chen, Jian Zhao
{"title":"A Third-order Sigma-delta Frequency-to-digital Converter Based on Reset Counter and PLL","authors":"Fan Xiao, Hongyi Liu, Yaxin Liu, Mingyi Chen, Jian Zhao","doi":"10.1109/ICTA50426.2020.9332041","DOIUrl":"https://doi.org/10.1109/ICTA50426.2020.9332041","url":null,"abstract":"A sigma-delta frequency-to-digital converter (FDC) based on a phase-locked loop (PLL) and a reset-counter is presented. The reset counter is inserted in the feedback path of a conventional PLL to quantize the phase and calculate the frequency. Simple analytical model shows that the quantization noise is third-order shaped at the output of this converter. Besides, compared to existing conversion techniques, this converter turns out to be the most power efficient approach, which is suitable for analog-to-digital conversion in low-power frequency modulated (FM) sensors.","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124322346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A TCAD-based Study of NDR Effect in NC-FinFET","authors":"Hao Yu, Chengxu Wang, X. Miao, Xingsheng Wang","doi":"10.1109/ICTA50426.2020.9332104","DOIUrl":"https://doi.org/10.1109/ICTA50426.2020.9332104","url":null,"abstract":"In this paper, the cause of inverse drain induced barrier lowering effect in negative capacitance field effect transistors (NCFETs) is discussed, and a capacitance model is given. Based on inverse DIBL effect, negative differential resistance phenomenon could occur, and these two effects are hard to be removed. Since higher on-off ratio and lower NDR cannot be achieved at the same condition, their relationship with device structure is also studied.","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117211670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Ka-Band CMOS Programmable Gain Amplifier with 15 dB Gain Tuning Range for Phased Arrays","authors":"Yongjie Li, Biao Deng, Wei Lv, Zongming Duan, Zipeng Xie, Liguo Sun","doi":"10.1109/ICTA50426.2020.9332068","DOIUrl":"https://doi.org/10.1109/ICTA50426.2020.9332068","url":null,"abstract":"A Ka-band 65 nm CMOS programmable gain amplifier (PGA) for phased array systems is presented in this paper. It is mainly composed of transformer-based input/output balun, seven parallel binary weighted digital programmable gain control units. Redundant control bit design, and off-chip FPGA are good for programmable testing, state selection and application. The PGA’s 3dB bandwidth is 31-37GHz, which achieves a gain adjustment range of 15dB (-6.7 $sim$ 8.3dB), stepping by 0.5dB. At the same time, the RMS error of phase variation is less than 3.9 degrees in 31-37GHz. The power consumption of the presented PGA is 9mW and the core area of the chip is 170um*620um.","PeriodicalId":432223,"journal":{"name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129441994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}