ACM International Conference on Computing Frontiers最新文献_第3页

Scaling analytics applications with OpenCL for loosely coupled heterogeneous clusters 使用OpenCL为松散耦合异构集群扩展分析应用程序

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482812

T. Suganuma, R. Krishnamurthy, Moriyoshi Ohara, T. Nakatani

引用次数: 2

Reasoning and prediction on opportunistic networks to improve data dissemination 机会网络的推理和预测，以改善数据传播

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482782

C. O. Rolim, C. Geyer

引用次数: 0

Bridging the programming gap between persistent and volatile memory using WrAP 使用WrAP弥合持久性和易失性内存之间的编程差距

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482806

Ellis R. Giles, K. Doshi, P. Varman

引用次数: 35

Computationally unifying urban masterplanning 计算统一城市总体规划

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482808

David Birch

{"title":"Computationally unifying urban masterplanning","authors":"David Birch","doi":"10.1145/2482767.2482808","DOIUrl":"https://doi.org/10.1145/2482767.2482808","url":null,"abstract":"Architectural design, particularly in large scale masterplanning projects, has yet to fully undergo the computational revolution experienced by other design-led industries such as automotive and aerospace. These industries use computational frameworks to undertake automated design analysis and design space exploration. However, within the Architectural, Engineering and Construction (AEC) industries we find no such computational platforms. This precludes the rapid analysis needed for quantitative design iteration which is required for sustainable design. This is a current computing frontier.\u0000 This paper considers the computational solutions to the challenges preventing such advances to improve architectural design performance for a more sustainable future. We present a practical discussion of the computational challenges and opportunities in this industry and present a computational framework \"HierSynth\" with a data model designed to the needs of this industry.\u0000 We report the results and lessons learned from applying this framework to a major commercial urban masterplanning project. This framework was used to automate and augment existing practice and was used to undertake previously infeasible, designer lead, design space exploration. During the casestudy an order of magnitude more analysis cycles were undertaken than literature suggests is normal; each occurring in hours not days.","PeriodicalId":430420,"journal":{"name":"ACM International Conference on Computing Frontiers","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123700761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Mapping applications for high performance on multithreaded, NUMA systems 映射应用程序在多线程，NUMA系统上的高性能

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482777

Guojing Cong, H. Wen

引用次数: 3

GPU acceleration of regular expression matching for large datasets: exploring the implementation space 大型数据集正则表达式匹配的GPU加速:探索实现空间

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482791

Xiaodong Yu, M. Becchi

{"title":"GPU acceleration of regular expression matching for large datasets: exploring the implementation space","authors":"Xiaodong Yu, M. Becchi","doi":"10.1145/2482767.2482791","DOIUrl":"https://doi.org/10.1145/2482767.2482791","url":null,"abstract":"Regular expression matching is a central task in several networking (and search) applications and has been accelerated on a variety of parallel architectures, including general purpose multi-core processors, network processors, field programmable gate arrays, and ASIC- and TCAM-based systems. All of these solutions are based on finite automata (either in deterministic or non-deterministic form) and mostly focus on effective memory representations for such automata. More recently, a handful of proposals have exploited the parallelism intrinsic in regular expression matching (i.e., coarse-grained packet-level parallelism and fine-grained data structure parallelism) to propose efficient regex-matching designs for GPUs. However, most GPU solutions aim at achieving good performance on small datasets, which are far less complex and problematic than those used in real-world applications.\u0000 In this work, we provide a more comprehensive study of regular expression matching on GPUs. To this end, we consider datasets of practical size and complexity and explore advantages and limitations of different automata representations and of various GPU implementation techniques. Our goal is not to show optimal speedup on specific datasets, but to highlight advantages and disadvantages of the GPU hardware in supporting state-of-the-art automata representations and encoding schemes, approaches that have been broadly adopted on other parallel memory-based platforms.","PeriodicalId":430420,"journal":{"name":"ACM International Conference on Computing Frontiers","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128111023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 61

DCNSim: a unified and cross-layer computer architecture simulation framework for data center network research DCNSim:用于数据中心网络研究的统一的跨层计算机体系结构仿真框架

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482792

Nongda Hu, Long Li, Binzhang Fu, Tao Li, Xiufeng Sui, Lixin Zhang

{"title":"DCNSim: a unified and cross-layer computer architecture simulation framework for data center network research","authors":"Nongda Hu, Long Li, Binzhang Fu, Tao Li, Xiufeng Sui, Lixin Zhang","doi":"10.1145/2482767.2482792","DOIUrl":"https://doi.org/10.1145/2482767.2482792","url":null,"abstract":"Within today's large-scale data centers, the inter-node communication is often the major bottleneck. This fact recently blooms the data center network (DCN) research. Since building a real data center is cost prohibitive, most of DCN studies rely on simulations. Unfortunately, state-of-the-art network simulators have limited support for real world applications, which prevents researchers from first-hand investigation. To address this issue, we developed a unified and cross-layer simulation framework, namely the DCNSim. By leveraging the two widely deployed simulators, DCNSim introduces computer architecture solutions into DCN research. With DCNSim, one could run packet-level network simulation driven by commercial applications while varying computer and network parameters, such as CPU frequency, memory access latency, network topology and protocols. With extensive validations, we show that DCNSim could accurately capture performance trends caused by changing computer and network parameters. Finally, we argue that future DCN researches should consider computer architecture factors via several case studies.","PeriodicalId":430420,"journal":{"name":"ACM International Conference on Computing Frontiers","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115926698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Network stacking considered harmful 网络堆叠被认为有害

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482780

Robert Surton

引用次数: 0

An algorithm for parallel calculation of trigonometric functions 三角函数的并行计算算法

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482778

T. Barrera, A. Hast, E. Bengtsson

引用次数: 0

RFiof: an RF approach to I/O-pin and memory controller scalability for off-chip memories RFiof:一种用于片外存储器的I/ o引脚和存储器控制器可扩展性的射频方法

ACM International Conference on Computing Frontiers Pub Date : 2013-05-14 DOI: 10.1145/2482767.2482803

M. Marino

{"title":"RFiof: an RF approach to I/O-pin and memory controller scalability for off-chip memories","authors":"M. Marino","doi":"10.1145/2482767.2482803","DOIUrl":"https://doi.org/10.1145/2482767.2482803","url":null,"abstract":"Given the maintenance of Moore's law behavior, core count is expected to continue growing, which keeps demanding more memory bandwidth destined to feed them. Memory controller (MC) scalability is crucial to achieve these bandwidth needs, but constrained by I/O pin scaling. In this study, we introduce RFiof, a radio-frequency (RF) memory approach to address I/O pin constraints which restrict MC scalability in off-chip-memory systems, while keeping interconnection energy at lower levels.\u0000 In this paper, we model, design, and demonstrate how RFiof achieves high MC I/O pin scalability for different memory technology generations, while evaluating its area and power/energy impact. By introducing the novel concept of RFpins -- to replace traditional MC I/O pins, and using RFMCs - MCs coupled to RF transmitters (TX)/receivers (RX), while employing a minimal RF-path between RFMC and ranks, we demonstrate that for a 32-out-of-order multicore configured with off-chip ranks with a 1:1 core-to-MC ratio, RFiof presents scalable 4 RFpins per RFMC -comparable to pin-scalable optical solutions - and is able to respectively improve bandwidth and performance by up to 7.2x and 8.6x, compared to the traditional baseline -- constrained to MC I/O pin counts. Furthermore, RFiof reduces about 65.6% of MC area usage, and 80% of memory path energy interconnection.","PeriodicalId":430420,"journal":{"name":"ACM International Conference on Computing Frontiers","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115943837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9