2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS)最新文献

1.37A,2A Current Regulating High Side Driver With 0.4μJ Energy Limitation in Unpowered State 1.37A,2A无电状态下能量限制0.4μJ的稳流高侧驱动器

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330639

Sri Navaneeth Easwaran, R. Weigel

引用次数: 1

Data Flow Mapping onto DNN Accelerator Considering Hardware Cost 考虑硬件成本的DNN加速器数据流映射

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330673

Baharealsadat Parchamdar, M. Reshadi

引用次数: 2

A Novel Modulation Method to Reduce Leakage Current in Transformerless Z-source PV Inverters 一种降低无变压器z源光伏逆变器漏电流的新型调制方法

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330676

Armin Abadifard, Pedram Ghavidel, N. Taherkhani, M. Sabahi

引用次数: 5

Formal Verification of Non-Functional Strategies of System-Level Power Management Architecture in Modern Processors 现代处理器系统级电源管理架构非功能策略的形式化验证

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330633

Reza Sharafinejad, B. Alizadeh, T. Nikoubin

引用次数: 0

A Framework for Modeling, Optimizing, and Implementing DNNs on FPGA Using HLS 基于HLS在FPGA上建模、优化和实现dnn的框架

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330667

Masoud Shahshahani, Bahareh Khabbazan, Mohammad Sabri, D. Bhatia

{"title":"A Framework for Modeling, Optimizing, and Implementing DNNs on FPGA Using HLS","authors":"Masoud Shahshahani, Bahareh Khabbazan, Mohammad Sabri, D. Bhatia","doi":"10.1109/DCAS51144.2020.9330667","DOIUrl":"https://doi.org/10.1109/DCAS51144.2020.9330667","url":null,"abstract":"Deep Neural Networks (DNNs) are gaining importance for implementing large inference engines. A designer must consider numerous design choices, data-flow types, processing elements, memory hierarchy, and data-precision for a DNN implementation. A collaborative algorithm/model/hardware tool is needed to enable a reconfigurable, fast, and efficient DNN hardware accelerator. We propose an accelerator framework that automatically generates an optimized FPGA-based model given DNNs from standard machine learning frameworks without humans in the loop. For faster, accurate, and efficient hardware implementation, the framework employs a coarse-grained software-model to estimate the performance and hardware utilization using mathematical relations. The results are a High-Level-Synthesis (HLS) code with a set of optimization pragmas for fine-tuning to optimizes the hardware generated from the previous phase. Various hardware-accelerator architecture can be selected based on user preferences such as performance and FPGA chip, and the neural network size. The hardware implementation of various DNN models is shown to prove the proposed framework's flexibility and performance.","PeriodicalId":428765,"journal":{"name":"2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122753407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Highly Efficient Rectifier and DC-DC Converter Designed in 180 nm CMOS Process for Ultra-Low Frequency Energy Harvesting Applications 基于180nm CMOS工艺设计的高效整流器和DC-DC变换器，用于超低频能量采集

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330671

Avinash Gunti, D. Biswas, I. Mahbub, P. Adhikari, R. Reid

{"title":"Highly Efficient Rectifier and DC-DC Converter Designed in 180 nm CMOS Process for Ultra-Low Frequency Energy Harvesting Applications","authors":"Avinash Gunti, D. Biswas, I. Mahbub, P. Adhikari, R. Reid","doi":"10.1109/DCAS51144.2020.9330671","DOIUrl":"https://doi.org/10.1109/DCAS51144.2020.9330671","url":null,"abstract":"This paper presents the integration of an AC-DC rectifier and a DC-DC boost converter circuit designed in 180 nm CMOS process for ultra-low frequency (<10 Hz) energy harvesting applications. The proposed rectifier is a very low voltage CMOS rectifier circuit that rectifies the low-frequency signal of 100–250 mV amplitude and 1–10 Hz frequency into DC voltage. In this work, the energy is harvested from the REWOD (reverse electrowetting-on-dielectric) generator, which is a reverse electrowetting technique that converts mechanical vibrations to electrical energy. The objective is to develop a REWOD-based self-powered motion (such as walking, running, jogging, etc.) tracking sensors that can be worn, thus harvesting energy from regular activities. To this end, the proposed circuits are designed in such a way that the output from the REWOD is rectified and regulated using a DC-DC converter which is a 5-stage cross-coupled switching circuit. Simulation results show a voltage range of 1.1 V-2.1 V, i.e., 850-1200% voltage conversion efficiency (VCE) and 30% power conversion efficiency (PCE) for low input signal in the range 100–250 mV in the low-frequency range. This performance verifies the integration of the rectifier and DC-DC boost converter which makes it highly suitable for various motion-based energy harvesting applications.","PeriodicalId":428765,"journal":{"name":"2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126582354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Deep Learning Deployment 深度学习部署

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330658

Shailesh Nirgudkar, S. Modi

引用次数: 0

Noise Reduction via Chopper Stabilization of Fully Differential Temperature Sensors for Hardware Security Applications 全差分温度传感器斩波稳定降噪，用于硬件安全应用

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330638

Haoran Wei, Mengting Yan, M. Onabajo

{"title":"Noise Reduction via Chopper Stabilization of Fully Differential Temperature Sensors for Hardware Security Applications","authors":"Haoran Wei, Mengting Yan, M. Onabajo","doi":"10.1109/DCAS51144.2020.9330638","DOIUrl":"https://doi.org/10.1109/DCAS51144.2020.9330638","url":null,"abstract":"The analysis and design of a chopper-stabilized fully-differential temperature sensor is presented for future on-chip power monitoring applications, particularly for the detection of malicious circuits. When temperature sensors are employed to sense the power dissipation of nearby circuits based on electrothermal coupling on the chip, the signal quality is limited by flicker noise because the slowly-varying temperature gradients imply that the information of interest is at low frequencies. The proposed two-stage transimpedance amplifier architecture has been designed with a chopping technique for flicker noise reduction by modulating the differential input currents from the bipolar junction transistors used as temperature sensors. Simulations of the prototype sensor circuit implemented in 130 nm CMOS technology show a low output-referred noise of 0.38 mVrms over a bandwidth from 1 to 370 Hz, while exhibiting a high temperature sensitivity of 2.09 V/ °C. A noise analysis was performed to derive equations that aid the design process with regards to trade-offs of parameters affecting noise performance, such as the chopping frequency and feedback resistance of the transimpedance amplifier.","PeriodicalId":428765,"journal":{"name":"2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131407771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Custom Real-Time-Kinematics Positioning System Testbed for Mobile Robot Localization 自定义移动机器人定位实时运动定位系统试验台

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330659

Theo Stangebye, Timothy Mohr, Anna Vallenti, Matt Grauff, Scott Koziol

引用次数: 1

Word Recognition Clinical Testing of Personalized Deep Reinforcement Learning Compression 个性化深度强化学习压缩的单词识别临床试验

2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS) Pub Date : 2020-11-15 DOI: 10.1109/DCAS51144.2020.9330651

Sara Akbarzadeh, N. Alamdari, Christina Campbell, E. Lobarinas, N. Kehtarnavaz

引用次数: 3