{"title":"Wormhole routing algorithms for twisted cube networks","authors":"P. Cull, S. Larson","doi":"10.1109/SPDP.1994.346106","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346106","url":null,"abstract":"The hypercube can be \"improved\" by \"twisting\" or rearranging edges to create new networks with smaller diameter and average distance. There are two criticisms of these twisted cube networks. First, these networks have not been shown to have deadlock-free routing algorithms. Second, while they can sometimes provide a better performance for a store-and-forward routing strategy, they have not been shown to be efficient when using a wormhole routing strategy. In this paper, we introduce a new network, the Bent Cube, and examine one recently published network, the Generalized Twisted Cube to address these issues.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124392227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Necklaces and scalability of Kautz digraphs","authors":"P. Tvrdík","doi":"10.1109/SPDP.1994.346140","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346140","url":null,"abstract":"In this paper, the following results are reported. The notion of Kautz necklaces, similar to de Bruijn ones, is introduced. A linear-time algorithm for generating Kautz necklaces in lexicographic ordering is described and a formula for enumerating the Kautz necklaces is given. A one-to-one mapping between de Bruijn and Kautz vertices preserving the necklaces is presented. Then the notion of necklaces is generalized and a simple necklace-based algorithm for factorization Kautz digraphs is described. Using this factorization, a construction of d-regular partial line digraphs of d-regular Kautz digraphs is described. This result implies that evenly distributed in the space between d-regular Kautz digraphs of diameter D and D+1 there are d-2 digraphs with the same routing and connectivity properties. Finally, a generalization of the method enables to construct partial line digraphs of any order with the connectivity close to d. These results make the Kautz digraphs unique in that sense that they are not only the very dense digraphs, but also very well incrementally scalable.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132050129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A comparison of techniques used for mapping parallel algorithms to message-passing multiprocessors","authors":"M. Dikaiakos, K. Steiglitz, Anne Rogers","doi":"10.1109/SPDP.1994.346137","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346137","url":null,"abstract":"This paper presents a comparison study of popular clustering and mapping heuristics which are used to map task-flow graphs to message-passing multiprocessors. To this end, we use task-graphs which are representative of important scientific algorithms running on data-sets of practical interest. The annotation which assigns weights to nodes and edges of the task-graphs is realistic. It reflects current trends in processor, communication channel, and message-passing interface technology and takes into consideration hardware characteristics of state-of-the-art multiprocessors. Our experiments show that applying realistic models for task-graph annotation affects the effectiveness and functionality of clustering and mapping techniques. Therefore, new heuristics are necessary that will take into account more practical models of communication costs. We present modifications to existing clustering and mapping algorithms which improve their efficiency and running-time for the practical models adopted.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132800050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Sohn, M. Sato, S. Sakai, Yuetsu Kodama, Y. Yamaguchi
{"title":"Parallel bidirectional heuristic search on the EM-4 multiprocessor","authors":"A. Sohn, M. Sato, S. Sakai, Yuetsu Kodama, Y. Yamaguchi","doi":"10.1109/SPDP.1994.346176","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346176","url":null,"abstract":"Solving search problems takes a large amount of computational resources both in terms of execution time and memory usage. This report presents experimental results of Parallel Bidirectional Heuristic Search (PBiHS) on the 80-processor EM-4 multithreaded data-flow multiprocessor. The PBiHS searches from two directions in parallel while search in each direction is also performed in parallel. Important data structures are distributed to all processors to help reduce the execution time of realistic problem sizes down to a few seconds or less. We implement two search problems, the Eight Puzzle and the Tower of Hanoi, and execute on the target multiprocessor. Execution results demonstrate that the Parallel Bidirectional Heuristic Search can solve the tree depth 20-40 of the Eight-Puzzle and the 3-9 disks of the Tower of Hanoi in an optimal or near optimal number of iterations in less than two seconds, is highly scalable as it gives over 40-fold speedup on 80 processors, and yields on the average 10-fold improvement over unidirectional search for the 8-Puzzle while generating a far less number of nodes.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116126097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Efficient submesh permutations in wormhole-routed meshes","authors":"Ching-Tien Ho, M. Kao","doi":"10.1109/SPDP.1994.346109","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346109","url":null,"abstract":"This paper studies how to concurrently permute related logical or physical submeshes in a d-dimensional n/spl times/.../spl times/n physical mesh via wormhole and dimension-ordered routing. Our objective is to minimize the congestion for realizing the permutations, while maximizing the number and dimensionality of permuted submeshes. We show that for d/spl les/2/spl alpha/+/spl beta/, concurrent independent permutations of n/sup /spl beta// related physical submeshes, each of /spl alpha/ dimensions, can be performed in two routing steps without congestion. If the permuted submeshes are logical ones, they can be permuted in one, instead of two, routing step. In addition, any shift operation along any axis of the logical mesh can be performed in the physical mesh without congestion. We also show that if all nodes know the permutation function, any permutation within a submesh of dimensions [2(d-1)/3] can be realized in three routing steps without congestion.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114992446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Pin-efficient networks for cubic neighborhoods","authors":"C. M. Fiduccia, K. J. Rappoport","doi":"10.1109/SPDP.1994.346141","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346141","url":null,"abstract":"Pin-efficient bussed network families are discussed that can-in one clock tick-simultaneously shift all data in a k-dimensional grid to neighboring processors in any one of the 3/sup k/-1 'compass directions' x/spl I.oarr//spl rarr/x/spl I.oarr/+/spl delta//spl I.oarr/, for every nonzero vector /spl delta//spl I.oarr/ /spl isin/ {-1,0,1}/sup k/. The networks have the advantages of being simple to describe (using a single 5-state automaton), extendible (the k-dimensional network is obtained by extending the busses of the (k-1)-dimensional network), and provably optimal for k/spl les/3. The networks use only [3/2(/spl radic/3)/sup k/] pins per processor, which is within 3/2 of the theoretical minimum number of pins required. The best previously known family uses 2/sup k/ pins.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"288 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115600170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
O. Gerstel, S. Zaks, M. Hurfin, N. Plouzeau, M. Raynal
{"title":"On-the-fly replay: a practical paradigm and its implementation for distributed debugging","authors":"O. Gerstel, S. Zaks, M. Hurfin, N. Plouzeau, M. Raynal","doi":"10.1109/SPDP.1994.346158","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346158","url":null,"abstract":"This paper presents a practical paradigm, called on-the-fly replay. This paradigm consists of running a distributed program twice at the same time: an original computation is running in a regular fashion, which also includes steps of making non-deterministic choices; this execution is driving a twin execution, whose non-deterministic choices do not have to be evaluated (since they are taken from the original computation). This paradigm has several interesting uses. Among them, distributed debugging is particularly noteworthy. The integration of this paradigm into a distributed debugging facility, called EREBUS, is described. This implementation was run on a distributed memory parallel machine (Intel Hypercube iPSC2) and experimental results are described, that demonstrate the advantage of this paradigm.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"129 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121922673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Optimal polling in communication networks","authors":"A. A. Rescigno","doi":"10.1109/SPDP.1994.346163","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346163","url":null,"abstract":"Polling is the process in which an issuing node of a communication network (polling station) broadcasts a query to every other node in the network and must receive a unique response from each of them. Polling can be thought as a combination of broadcasting and gathering and finds wide applications in the control of distributed systems. In this paper we consider the problem of polling in minimum time. We give a general lower bound on the minimum number of time units to accomplish polling in any network and we present optimal polling algorithms for several classes of graphs, including hypercubes and recursively decomposable Cayley graphs.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129026104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Computational bounds for the simple and the MRMW PRAM","authors":"F. Luccio, L. Pagli","doi":"10.1109/SPDP.1994.346123","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346123","url":null,"abstract":"We define the simple PRAM, where consecutive transfers between memory and processors cannot be done in a single step. Some acclaimed \"surprising\" results in PRAM theory, as computing the OR of n bits in less that log/sub 2/n steps, are proved not to hold in the new model, and are replaced with more natural results. In particular, the OR can be computed in log/sub 2/n+O(1) steps, and this bound is tight. We then introduce the Multiple Read Multiple Write (MRMW) PRAM model, that allows a bounded amount of simultaneous transfers from m memory cells to one processor (MR), and vice-versa (MW), and derive exact computational bounds as a function of m. In particular, the OR can be computed in log/sub b/n steps, with b=(m+2+/spl radic/(m/sup 2/+4m))/2 for the MRMW model with consecutive transfers, and b=1+/spl radic/(m) for the simple model, and these bounds are tight.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128511792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Sharing networked workstations: a performance model","authors":"G. D. Peterson, R. Chamberlain","doi":"10.1109/SPDP.1994.346153","DOIUrl":"https://doi.org/10.1109/SPDP.1994.346153","url":null,"abstract":"The utilization of networked, shared, heterogeneous workstations as an inexpensive parallel computational platform is an appealing idea. However, most performance models for parallel computation are oriented towards the use of tightly-coupled, dedicated, homogeneous processors. We develop and validate an analytic performance model for synchronous iterative algorithms executing on networked workstations. The model includes the effects of application load, background load, and processor heterogeneity. The model is validated using a pair of applications: a nonlinear optimization code and discrete-event simulation.<<ETX>>","PeriodicalId":422721,"journal":{"name":"Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126095875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}